1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (C) 2018 Cadence Design Systems Inc.
4 *
5 * Author: Boris Brezillon <boris.brezillon@bootlin.com>
6 */
7
8 #include <linux/atomic.h>
9 #include <linux/bug.h>
10 #include <linux/device.h>
11 #include <linux/err.h>
12 #include <linux/export.h>
13 #include <linux/kernel.h>
14 #include <linux/list.h>
15 #include <linux/of.h>
16 #include <linux/slab.h>
17 #include <linux/spinlock.h>
18 #include <linux/workqueue.h>
19
20 #include "internals.h"
21
22 static DEFINE_IDR(i3c_bus_idr);
23 static DEFINE_MUTEX(i3c_core_lock);
24 static int __i3c_first_dynamic_bus_num;
25 static BLOCKING_NOTIFIER_HEAD(i3c_bus_notifier);
26
27 /**
28 * i3c_bus_maintenance_lock - Lock the bus for a maintenance operation
29 * @bus: I3C bus to take the lock on
30 *
31 * This function takes the bus lock so that no other operations can occur on
32 * the bus. This is needed for all kind of bus maintenance operation, like
33 * - enabling/disabling slave events
34 * - re-triggering DAA
35 * - changing the dynamic address of a device
36 * - relinquishing mastership
37 * - ...
38 *
39 * The reason for this kind of locking is that we don't want drivers and core
40 * logic to rely on I3C device information that could be changed behind their
41 * back.
42 */
i3c_bus_maintenance_lock(struct i3c_bus * bus)43 static void i3c_bus_maintenance_lock(struct i3c_bus *bus)
44 {
45 down_write(&bus->lock);
46 }
47
48 /**
49 * i3c_bus_maintenance_unlock - Release the bus lock after a maintenance
50 * operation
51 * @bus: I3C bus to release the lock on
52 *
53 * Should be called when the bus maintenance operation is done. See
54 * i3c_bus_maintenance_lock() for more details on what these maintenance
55 * operations are.
56 */
i3c_bus_maintenance_unlock(struct i3c_bus * bus)57 static void i3c_bus_maintenance_unlock(struct i3c_bus *bus)
58 {
59 up_write(&bus->lock);
60 }
61
62 /**
63 * i3c_bus_normaluse_lock - Lock the bus for a normal operation
64 * @bus: I3C bus to take the lock on
65 *
66 * This function takes the bus lock for any operation that is not a maintenance
67 * operation (see i3c_bus_maintenance_lock() for a non-exhaustive list of
68 * maintenance operations). Basically all communications with I3C devices are
69 * normal operations (HDR, SDR transfers or CCC commands that do not change bus
70 * state or I3C dynamic address).
71 *
72 * Note that this lock is not guaranteeing serialization of normal operations.
73 * In other words, transfer requests passed to the I3C master can be submitted
74 * in parallel and I3C master drivers have to use their own locking to make
75 * sure two different communications are not inter-mixed, or access to the
76 * output/input queue is not done while the engine is busy.
77 */
i3c_bus_normaluse_lock(struct i3c_bus * bus)78 void i3c_bus_normaluse_lock(struct i3c_bus *bus)
79 {
80 down_read(&bus->lock);
81 }
82
83 /**
84 * i3c_bus_normaluse_unlock - Release the bus lock after a normal operation
85 * @bus: I3C bus to release the lock on
86 *
87 * Should be called when a normal operation is done. See
88 * i3c_bus_normaluse_lock() for more details on what these normal operations
89 * are.
90 */
i3c_bus_normaluse_unlock(struct i3c_bus * bus)91 void i3c_bus_normaluse_unlock(struct i3c_bus *bus)
92 {
93 up_read(&bus->lock);
94 }
95
96 static struct i3c_master_controller *
i3c_bus_to_i3c_master(struct i3c_bus * i3cbus)97 i3c_bus_to_i3c_master(struct i3c_bus *i3cbus)
98 {
99 return container_of(i3cbus, struct i3c_master_controller, bus);
100 }
101
dev_to_i3cmaster(struct device * dev)102 static struct i3c_master_controller *dev_to_i3cmaster(struct device *dev)
103 {
104 return container_of(dev, struct i3c_master_controller, dev);
105 }
106
107 static const struct device_type i3c_device_type;
108
dev_to_i3cbus(struct device * dev)109 static struct i3c_bus *dev_to_i3cbus(struct device *dev)
110 {
111 struct i3c_master_controller *master;
112
113 if (dev->type == &i3c_device_type)
114 return dev_to_i3cdev(dev)->bus;
115
116 master = dev_to_i3cmaster(dev);
117
118 return &master->bus;
119 }
120
dev_to_i3cdesc(struct device * dev)121 static struct i3c_dev_desc *dev_to_i3cdesc(struct device *dev)
122 {
123 struct i3c_master_controller *master;
124
125 if (dev->type == &i3c_device_type)
126 return dev_to_i3cdev(dev)->desc;
127
128 master = dev_to_i3cmaster(dev);
129
130 return master->this;
131 }
132
bcr_show(struct device * dev,struct device_attribute * da,char * buf)133 static ssize_t bcr_show(struct device *dev,
134 struct device_attribute *da,
135 char *buf)
136 {
137 struct i3c_bus *bus = dev_to_i3cbus(dev);
138 struct i3c_dev_desc *desc;
139 ssize_t ret;
140
141 i3c_bus_normaluse_lock(bus);
142 desc = dev_to_i3cdesc(dev);
143 ret = sprintf(buf, "%x\n", desc->info.bcr);
144 i3c_bus_normaluse_unlock(bus);
145
146 return ret;
147 }
148 static DEVICE_ATTR_RO(bcr);
149
dcr_show(struct device * dev,struct device_attribute * da,char * buf)150 static ssize_t dcr_show(struct device *dev,
151 struct device_attribute *da,
152 char *buf)
153 {
154 struct i3c_bus *bus = dev_to_i3cbus(dev);
155 struct i3c_dev_desc *desc;
156 ssize_t ret;
157
158 i3c_bus_normaluse_lock(bus);
159 desc = dev_to_i3cdesc(dev);
160 ret = sprintf(buf, "%x\n", desc->info.dcr);
161 i3c_bus_normaluse_unlock(bus);
162
163 return ret;
164 }
165 static DEVICE_ATTR_RO(dcr);
166
pid_show(struct device * dev,struct device_attribute * da,char * buf)167 static ssize_t pid_show(struct device *dev,
168 struct device_attribute *da,
169 char *buf)
170 {
171 struct i3c_bus *bus = dev_to_i3cbus(dev);
172 struct i3c_dev_desc *desc;
173 ssize_t ret;
174
175 i3c_bus_normaluse_lock(bus);
176 desc = dev_to_i3cdesc(dev);
177 ret = sprintf(buf, "%llx\n", desc->info.pid);
178 i3c_bus_normaluse_unlock(bus);
179
180 return ret;
181 }
182 static DEVICE_ATTR_RO(pid);
183
dynamic_address_show(struct device * dev,struct device_attribute * da,char * buf)184 static ssize_t dynamic_address_show(struct device *dev,
185 struct device_attribute *da,
186 char *buf)
187 {
188 struct i3c_bus *bus = dev_to_i3cbus(dev);
189 struct i3c_dev_desc *desc;
190 ssize_t ret;
191
192 i3c_bus_normaluse_lock(bus);
193 desc = dev_to_i3cdesc(dev);
194 ret = sprintf(buf, "%02x\n", desc->info.dyn_addr);
195 i3c_bus_normaluse_unlock(bus);
196
197 return ret;
198 }
199 static DEVICE_ATTR_RO(dynamic_address);
200
201 static const char * const hdrcap_strings[] = {
202 "hdr-ddr", "hdr-tsp", "hdr-tsl",
203 };
204
hdrcap_show(struct device * dev,struct device_attribute * da,char * buf)205 static ssize_t hdrcap_show(struct device *dev,
206 struct device_attribute *da,
207 char *buf)
208 {
209 struct i3c_bus *bus = dev_to_i3cbus(dev);
210 struct i3c_dev_desc *desc;
211 ssize_t offset = 0, ret;
212 unsigned long caps;
213 int mode;
214
215 i3c_bus_normaluse_lock(bus);
216 desc = dev_to_i3cdesc(dev);
217 caps = desc->info.hdr_cap;
218 for_each_set_bit(mode, &caps, 8) {
219 if (mode >= ARRAY_SIZE(hdrcap_strings))
220 break;
221
222 if (!hdrcap_strings[mode])
223 continue;
224
225 ret = sprintf(buf + offset, offset ? " %s" : "%s",
226 hdrcap_strings[mode]);
227 if (ret < 0)
228 goto out;
229
230 offset += ret;
231 }
232
233 ret = sprintf(buf + offset, "\n");
234 if (ret < 0)
235 goto out;
236
237 ret = offset + ret;
238
239 out:
240 i3c_bus_normaluse_unlock(bus);
241
242 return ret;
243 }
244 static DEVICE_ATTR_RO(hdrcap);
245
modalias_show(struct device * dev,struct device_attribute * da,char * buf)246 static ssize_t modalias_show(struct device *dev,
247 struct device_attribute *da, char *buf)
248 {
249 struct i3c_device *i3c = dev_to_i3cdev(dev);
250 struct i3c_device_info devinfo;
251 u16 manuf, part, ext;
252
253 i3c_device_get_info(i3c, &devinfo);
254 manuf = I3C_PID_MANUF_ID(devinfo.pid);
255 part = I3C_PID_PART_ID(devinfo.pid);
256 ext = I3C_PID_EXTRA_INFO(devinfo.pid);
257
258 if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
259 return sprintf(buf, "i3c:dcr%02Xmanuf%04X", devinfo.dcr,
260 manuf);
261
262 return sprintf(buf, "i3c:dcr%02Xmanuf%04Xpart%04Xext%04X",
263 devinfo.dcr, manuf, part, ext);
264 }
265 static DEVICE_ATTR_RO(modalias);
266
267 static struct attribute *i3c_device_attrs[] = {
268 &dev_attr_bcr.attr,
269 &dev_attr_dcr.attr,
270 &dev_attr_pid.attr,
271 &dev_attr_dynamic_address.attr,
272 &dev_attr_hdrcap.attr,
273 &dev_attr_modalias.attr,
274 NULL,
275 };
276 ATTRIBUTE_GROUPS(i3c_device);
277
i3c_device_uevent(const struct device * dev,struct kobj_uevent_env * env)278 static int i3c_device_uevent(const struct device *dev, struct kobj_uevent_env *env)
279 {
280 const struct i3c_device *i3cdev = dev_to_i3cdev(dev);
281 struct i3c_device_info devinfo;
282 u16 manuf, part, ext;
283
284 if (i3cdev->desc)
285 devinfo = i3cdev->desc->info;
286 manuf = I3C_PID_MANUF_ID(devinfo.pid);
287 part = I3C_PID_PART_ID(devinfo.pid);
288 ext = I3C_PID_EXTRA_INFO(devinfo.pid);
289
290 if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
291 return add_uevent_var(env, "MODALIAS=i3c:dcr%02Xmanuf%04X",
292 devinfo.dcr, manuf);
293
294 return add_uevent_var(env,
295 "MODALIAS=i3c:dcr%02Xmanuf%04Xpart%04Xext%04X",
296 devinfo.dcr, manuf, part, ext);
297 }
298
299 static const struct device_type i3c_device_type = {
300 .groups = i3c_device_groups,
301 .uevent = i3c_device_uevent,
302 };
303
i3c_device_match(struct device * dev,struct device_driver * drv)304 static int i3c_device_match(struct device *dev, struct device_driver *drv)
305 {
306 struct i3c_device *i3cdev;
307 struct i3c_driver *i3cdrv;
308
309 if (dev->type != &i3c_device_type)
310 return 0;
311
312 i3cdev = dev_to_i3cdev(dev);
313 i3cdrv = drv_to_i3cdrv(drv);
314 if (i3c_device_match_id(i3cdev, i3cdrv->id_table))
315 return 1;
316
317 return 0;
318 }
319
i3c_device_probe(struct device * dev)320 static int i3c_device_probe(struct device *dev)
321 {
322 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
323 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
324
325 return driver->probe(i3cdev);
326 }
327
i3c_device_remove(struct device * dev)328 static void i3c_device_remove(struct device *dev)
329 {
330 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
331 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
332
333 if (driver->remove)
334 driver->remove(i3cdev);
335
336 i3c_device_free_ibi(i3cdev);
337 }
338
339 struct bus_type i3c_bus_type = {
340 .name = "i3c",
341 .match = i3c_device_match,
342 .probe = i3c_device_probe,
343 .remove = i3c_device_remove,
344 };
345
346 static enum i3c_addr_slot_status
i3c_bus_get_addr_slot_status_mask(struct i3c_bus * bus,u16 addr,u32 mask)347 i3c_bus_get_addr_slot_status_mask(struct i3c_bus *bus, u16 addr, u32 mask)
348 {
349 unsigned long status;
350 int bitpos = addr * I3C_ADDR_SLOT_STATUS_BITS;
351
352 if (addr > I2C_MAX_ADDR)
353 return I3C_ADDR_SLOT_RSVD;
354
355 status = bus->addrslots[bitpos / BITS_PER_LONG];
356 status >>= bitpos % BITS_PER_LONG;
357
358 return status & mask;
359 }
360
361 static enum i3c_addr_slot_status
i3c_bus_get_addr_slot_status(struct i3c_bus * bus,u16 addr)362 i3c_bus_get_addr_slot_status(struct i3c_bus *bus, u16 addr)
363 {
364 return i3c_bus_get_addr_slot_status_mask(bus, addr, I3C_ADDR_SLOT_STATUS_MASK);
365 }
366
i3c_bus_set_addr_slot_status_mask(struct i3c_bus * bus,u16 addr,enum i3c_addr_slot_status status,u32 mask)367 static void i3c_bus_set_addr_slot_status_mask(struct i3c_bus *bus, u16 addr,
368 enum i3c_addr_slot_status status, u32 mask)
369 {
370 int bitpos = addr * I3C_ADDR_SLOT_STATUS_BITS;
371 unsigned long *ptr;
372
373 if (addr > I2C_MAX_ADDR)
374 return;
375
376 ptr = bus->addrslots + (bitpos / BITS_PER_LONG);
377 *ptr &= ~((unsigned long)mask << (bitpos % BITS_PER_LONG));
378 *ptr |= ((unsigned long)status & mask) << (bitpos % BITS_PER_LONG);
379 }
380
i3c_bus_set_addr_slot_status(struct i3c_bus * bus,u16 addr,enum i3c_addr_slot_status status)381 static void i3c_bus_set_addr_slot_status(struct i3c_bus *bus, u16 addr,
382 enum i3c_addr_slot_status status)
383 {
384 i3c_bus_set_addr_slot_status_mask(bus, addr, status, I3C_ADDR_SLOT_STATUS_MASK);
385 }
386
i3c_bus_dev_addr_is_avail(struct i3c_bus * bus,u8 addr)387 static bool i3c_bus_dev_addr_is_avail(struct i3c_bus *bus, u8 addr)
388 {
389 enum i3c_addr_slot_status status;
390
391 status = i3c_bus_get_addr_slot_status(bus, addr);
392
393 return status == I3C_ADDR_SLOT_FREE;
394 }
395
396 /*
397 * ┌────┬─────────────┬───┬─────────┬───┐
398 * │S/Sr│ 7'h7E RnW=0 │ACK│ ENTDAA │ T ├────┐
399 * └────┴─────────────┴───┴─────────┴───┘ │
400 * ┌─────────────────────────────────────────┘
401 * │ ┌──┬─────────────┬───┬─────────────────┬────────────────┬───┬─────────┐
402 * └─►│Sr│7'h7E RnW=1 │ACK│48bit UID BCR DCR│Assign 7bit Addr│PAR│ ACK/NACK│
403 * └──┴─────────────┴───┴─────────────────┴────────────────┴───┴─────────┘
404 * Some master controllers (such as HCI) need to prepare the entire above transaction before
405 * sending it out to the I3C bus. This means that a 7-bit dynamic address needs to be allocated
406 * before knowing the target device's UID information.
407 *
408 * However, some I3C targets may request specific addresses (called as "init_dyn_addr"), which is
409 * typically specified by the DT-'s assigned-address property. Lower addresses having higher IBI
410 * priority. If it is available, i3c_bus_get_free_addr() preferably return a free address that is
411 * not in the list of desired addresses (called as "init_dyn_addr"). This allows the device with
412 * the "init_dyn_addr" to switch to its "init_dyn_addr" when it hot-joins the I3C bus. Otherwise,
413 * if the "init_dyn_addr" is already in use by another I3C device, the target device will not be
414 * able to switch to its desired address.
415 *
416 * If the previous step fails, fallback returning one of the remaining unassigned address,
417 * regardless of its state in the desired list.
418 */
i3c_bus_get_free_addr(struct i3c_bus * bus,u8 start_addr)419 static int i3c_bus_get_free_addr(struct i3c_bus *bus, u8 start_addr)
420 {
421 enum i3c_addr_slot_status status;
422 u8 addr;
423
424 for (addr = start_addr; addr < I3C_MAX_ADDR; addr++) {
425 status = i3c_bus_get_addr_slot_status_mask(bus, addr,
426 I3C_ADDR_SLOT_EXT_STATUS_MASK);
427 if (status == I3C_ADDR_SLOT_FREE)
428 return addr;
429 }
430
431 for (addr = start_addr; addr < I3C_MAX_ADDR; addr++) {
432 status = i3c_bus_get_addr_slot_status_mask(bus, addr,
433 I3C_ADDR_SLOT_STATUS_MASK);
434 if (status == I3C_ADDR_SLOT_FREE)
435 return addr;
436 }
437
438 return -ENOMEM;
439 }
440
i3c_bus_init_addrslots(struct i3c_bus * bus)441 static void i3c_bus_init_addrslots(struct i3c_bus *bus)
442 {
443 int i;
444
445 /* Addresses 0 to 7 are reserved. */
446 for (i = 0; i < 8; i++)
447 i3c_bus_set_addr_slot_status(bus, i, I3C_ADDR_SLOT_RSVD);
448
449 /*
450 * Reserve broadcast address and all addresses that might collide
451 * with the broadcast address when facing a single bit error.
452 */
453 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR,
454 I3C_ADDR_SLOT_RSVD);
455 for (i = 0; i < 7; i++)
456 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR ^ BIT(i),
457 I3C_ADDR_SLOT_RSVD);
458 }
459
i3c_bus_cleanup(struct i3c_bus * i3cbus)460 static void i3c_bus_cleanup(struct i3c_bus *i3cbus)
461 {
462 mutex_lock(&i3c_core_lock);
463 idr_remove(&i3c_bus_idr, i3cbus->id);
464 mutex_unlock(&i3c_core_lock);
465 }
466
i3c_bus_init(struct i3c_bus * i3cbus,struct device_node * np)467 static int i3c_bus_init(struct i3c_bus *i3cbus, struct device_node *np)
468 {
469 int ret, start, end, id = -1;
470
471 init_rwsem(&i3cbus->lock);
472 INIT_LIST_HEAD(&i3cbus->devs.i2c);
473 INIT_LIST_HEAD(&i3cbus->devs.i3c);
474 i3c_bus_init_addrslots(i3cbus);
475 i3cbus->mode = I3C_BUS_MODE_PURE;
476
477 if (np)
478 id = of_alias_get_id(np, "i3c");
479
480 mutex_lock(&i3c_core_lock);
481 if (id >= 0) {
482 start = id;
483 end = start + 1;
484 } else {
485 start = __i3c_first_dynamic_bus_num;
486 end = 0;
487 }
488
489 ret = idr_alloc(&i3c_bus_idr, i3cbus, start, end, GFP_KERNEL);
490 mutex_unlock(&i3c_core_lock);
491
492 if (ret < 0)
493 return ret;
494
495 i3cbus->id = ret;
496
497 return 0;
498 }
499
i3c_for_each_bus_locked(int (* fn)(struct i3c_bus * bus,void * data),void * data)500 void i3c_for_each_bus_locked(int (*fn)(struct i3c_bus *bus, void *data),
501 void *data)
502 {
503 struct i3c_bus *bus;
504 int id;
505
506 mutex_lock(&i3c_core_lock);
507 idr_for_each_entry(&i3c_bus_idr, bus, id)
508 fn(bus, data);
509 mutex_unlock(&i3c_core_lock);
510 }
511 EXPORT_SYMBOL_GPL(i3c_for_each_bus_locked);
512
i3c_register_notifier(struct notifier_block * nb)513 int i3c_register_notifier(struct notifier_block *nb)
514 {
515 return blocking_notifier_chain_register(&i3c_bus_notifier, nb);
516 }
517 EXPORT_SYMBOL_GPL(i3c_register_notifier);
518
i3c_unregister_notifier(struct notifier_block * nb)519 int i3c_unregister_notifier(struct notifier_block *nb)
520 {
521 return blocking_notifier_chain_unregister(&i3c_bus_notifier, nb);
522 }
523 EXPORT_SYMBOL_GPL(i3c_unregister_notifier);
524
i3c_bus_notify(struct i3c_bus * bus,unsigned int action)525 static void i3c_bus_notify(struct i3c_bus *bus, unsigned int action)
526 {
527 blocking_notifier_call_chain(&i3c_bus_notifier, action, bus);
528 }
529
530 static const char * const i3c_bus_mode_strings[] = {
531 [I3C_BUS_MODE_PURE] = "pure",
532 [I3C_BUS_MODE_MIXED_FAST] = "mixed-fast",
533 [I3C_BUS_MODE_MIXED_LIMITED] = "mixed-limited",
534 [I3C_BUS_MODE_MIXED_SLOW] = "mixed-slow",
535 };
536
mode_show(struct device * dev,struct device_attribute * da,char * buf)537 static ssize_t mode_show(struct device *dev,
538 struct device_attribute *da,
539 char *buf)
540 {
541 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
542 ssize_t ret;
543
544 i3c_bus_normaluse_lock(i3cbus);
545 if (i3cbus->mode < 0 ||
546 i3cbus->mode >= ARRAY_SIZE(i3c_bus_mode_strings) ||
547 !i3c_bus_mode_strings[i3cbus->mode])
548 ret = sprintf(buf, "unknown\n");
549 else
550 ret = sprintf(buf, "%s\n", i3c_bus_mode_strings[i3cbus->mode]);
551 i3c_bus_normaluse_unlock(i3cbus);
552
553 return ret;
554 }
555 static DEVICE_ATTR_RO(mode);
556
current_master_show(struct device * dev,struct device_attribute * da,char * buf)557 static ssize_t current_master_show(struct device *dev,
558 struct device_attribute *da,
559 char *buf)
560 {
561 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
562 ssize_t ret;
563
564 i3c_bus_normaluse_lock(i3cbus);
565 ret = sprintf(buf, "%d-%llx\n", i3cbus->id,
566 i3cbus->cur_master->info.pid);
567 i3c_bus_normaluse_unlock(i3cbus);
568
569 return ret;
570 }
571 static DEVICE_ATTR_RO(current_master);
572
i3c_scl_frequency_show(struct device * dev,struct device_attribute * da,char * buf)573 static ssize_t i3c_scl_frequency_show(struct device *dev,
574 struct device_attribute *da,
575 char *buf)
576 {
577 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
578 ssize_t ret;
579
580 i3c_bus_normaluse_lock(i3cbus);
581 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i3c);
582 i3c_bus_normaluse_unlock(i3cbus);
583
584 return ret;
585 }
586 static DEVICE_ATTR_RO(i3c_scl_frequency);
587
i2c_scl_frequency_show(struct device * dev,struct device_attribute * da,char * buf)588 static ssize_t i2c_scl_frequency_show(struct device *dev,
589 struct device_attribute *da,
590 char *buf)
591 {
592 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
593 ssize_t ret;
594
595 i3c_bus_normaluse_lock(i3cbus);
596 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i2c);
597 i3c_bus_normaluse_unlock(i3cbus);
598
599 return ret;
600 }
601 static DEVICE_ATTR_RO(i2c_scl_frequency);
602
i3c_set_hotjoin(struct i3c_master_controller * master,bool enable)603 static int i3c_set_hotjoin(struct i3c_master_controller *master, bool enable)
604 {
605 int ret;
606
607 if (!master || !master->ops)
608 return -EINVAL;
609
610 if (!master->ops->enable_hotjoin || !master->ops->disable_hotjoin)
611 return -EINVAL;
612
613 i3c_bus_normaluse_lock(&master->bus);
614
615 if (enable)
616 ret = master->ops->enable_hotjoin(master);
617 else
618 ret = master->ops->disable_hotjoin(master);
619
620 master->hotjoin = enable;
621
622 i3c_bus_normaluse_unlock(&master->bus);
623
624 return ret;
625 }
626
hotjoin_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)627 static ssize_t hotjoin_store(struct device *dev, struct device_attribute *attr,
628 const char *buf, size_t count)
629 {
630 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
631 int ret;
632 bool res;
633
634 if (!i3cbus->cur_master)
635 return -EINVAL;
636
637 if (kstrtobool(buf, &res))
638 return -EINVAL;
639
640 ret = i3c_set_hotjoin(i3cbus->cur_master->common.master, res);
641 if (ret)
642 return ret;
643
644 return count;
645 }
646
647 /*
648 * i3c_master_enable_hotjoin - Enable hotjoin
649 * @master: I3C master object
650 *
651 * Return: a 0 in case of success, an negative error code otherwise.
652 */
i3c_master_enable_hotjoin(struct i3c_master_controller * master)653 int i3c_master_enable_hotjoin(struct i3c_master_controller *master)
654 {
655 return i3c_set_hotjoin(master, true);
656 }
657 EXPORT_SYMBOL_GPL(i3c_master_enable_hotjoin);
658
659 /*
660 * i3c_master_disable_hotjoin - Disable hotjoin
661 * @master: I3C master object
662 *
663 * Return: a 0 in case of success, an negative error code otherwise.
664 */
i3c_master_disable_hotjoin(struct i3c_master_controller * master)665 int i3c_master_disable_hotjoin(struct i3c_master_controller *master)
666 {
667 return i3c_set_hotjoin(master, false);
668 }
669 EXPORT_SYMBOL_GPL(i3c_master_disable_hotjoin);
670
hotjoin_show(struct device * dev,struct device_attribute * da,char * buf)671 static ssize_t hotjoin_show(struct device *dev, struct device_attribute *da, char *buf)
672 {
673 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
674 ssize_t ret;
675
676 i3c_bus_normaluse_lock(i3cbus);
677 ret = sysfs_emit(buf, "%d\n", i3cbus->cur_master->common.master->hotjoin);
678 i3c_bus_normaluse_unlock(i3cbus);
679
680 return ret;
681 }
682
683 static DEVICE_ATTR_RW(hotjoin);
684
685 static struct attribute *i3c_masterdev_attrs[] = {
686 &dev_attr_mode.attr,
687 &dev_attr_current_master.attr,
688 &dev_attr_i3c_scl_frequency.attr,
689 &dev_attr_i2c_scl_frequency.attr,
690 &dev_attr_bcr.attr,
691 &dev_attr_dcr.attr,
692 &dev_attr_pid.attr,
693 &dev_attr_dynamic_address.attr,
694 &dev_attr_hdrcap.attr,
695 &dev_attr_hotjoin.attr,
696 NULL,
697 };
698 ATTRIBUTE_GROUPS(i3c_masterdev);
699
i3c_masterdev_release(struct device * dev)700 static void i3c_masterdev_release(struct device *dev)
701 {
702 struct i3c_master_controller *master = dev_to_i3cmaster(dev);
703 struct i3c_bus *bus = dev_to_i3cbus(dev);
704
705 if (master->wq)
706 destroy_workqueue(master->wq);
707
708 WARN_ON(!list_empty(&bus->devs.i2c) || !list_empty(&bus->devs.i3c));
709 i3c_bus_cleanup(bus);
710
711 of_node_put(dev->of_node);
712 }
713
714 static const struct device_type i3c_masterdev_type = {
715 .groups = i3c_masterdev_groups,
716 };
717
i3c_bus_set_mode(struct i3c_bus * i3cbus,enum i3c_bus_mode mode,unsigned long max_i2c_scl_rate)718 static int i3c_bus_set_mode(struct i3c_bus *i3cbus, enum i3c_bus_mode mode,
719 unsigned long max_i2c_scl_rate)
720 {
721 struct i3c_master_controller *master = i3c_bus_to_i3c_master(i3cbus);
722
723 i3cbus->mode = mode;
724
725 switch (i3cbus->mode) {
726 case I3C_BUS_MODE_PURE:
727 if (!i3cbus->scl_rate.i3c)
728 i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
729 break;
730 case I3C_BUS_MODE_MIXED_FAST:
731 case I3C_BUS_MODE_MIXED_LIMITED:
732 if (!i3cbus->scl_rate.i3c)
733 i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
734 if (!i3cbus->scl_rate.i2c)
735 i3cbus->scl_rate.i2c = max_i2c_scl_rate;
736 break;
737 case I3C_BUS_MODE_MIXED_SLOW:
738 if (!i3cbus->scl_rate.i2c)
739 i3cbus->scl_rate.i2c = max_i2c_scl_rate;
740 if (!i3cbus->scl_rate.i3c ||
741 i3cbus->scl_rate.i3c > i3cbus->scl_rate.i2c)
742 i3cbus->scl_rate.i3c = i3cbus->scl_rate.i2c;
743 break;
744 default:
745 return -EINVAL;
746 }
747
748 dev_dbg(&master->dev, "i2c-scl = %ld Hz i3c-scl = %ld Hz\n",
749 i3cbus->scl_rate.i2c, i3cbus->scl_rate.i3c);
750
751 /*
752 * I3C/I2C frequency may have been overridden, check that user-provided
753 * values are not exceeding max possible frequency.
754 */
755 if (i3cbus->scl_rate.i3c > I3C_BUS_MAX_I3C_SCL_RATE ||
756 i3cbus->scl_rate.i2c > I3C_BUS_I2C_FM_PLUS_SCL_RATE)
757 return -EINVAL;
758
759 return 0;
760 }
761
762 static struct i3c_master_controller *
i2c_adapter_to_i3c_master(struct i2c_adapter * adap)763 i2c_adapter_to_i3c_master(struct i2c_adapter *adap)
764 {
765 return container_of(adap, struct i3c_master_controller, i2c);
766 }
767
768 static struct i2c_adapter *
i3c_master_to_i2c_adapter(struct i3c_master_controller * master)769 i3c_master_to_i2c_adapter(struct i3c_master_controller *master)
770 {
771 return &master->i2c;
772 }
773
i3c_master_free_i2c_dev(struct i2c_dev_desc * dev)774 static void i3c_master_free_i2c_dev(struct i2c_dev_desc *dev)
775 {
776 kfree(dev);
777 }
778
779 static struct i2c_dev_desc *
i3c_master_alloc_i2c_dev(struct i3c_master_controller * master,u16 addr,u8 lvr)780 i3c_master_alloc_i2c_dev(struct i3c_master_controller *master,
781 u16 addr, u8 lvr)
782 {
783 struct i2c_dev_desc *dev;
784
785 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
786 if (!dev)
787 return ERR_PTR(-ENOMEM);
788
789 dev->common.master = master;
790 dev->addr = addr;
791 dev->lvr = lvr;
792
793 return dev;
794 }
795
i3c_ccc_cmd_dest_init(struct i3c_ccc_cmd_dest * dest,u8 addr,u16 payloadlen)796 static void *i3c_ccc_cmd_dest_init(struct i3c_ccc_cmd_dest *dest, u8 addr,
797 u16 payloadlen)
798 {
799 dest->addr = addr;
800 dest->payload.len = payloadlen;
801 if (payloadlen)
802 dest->payload.data = kzalloc(payloadlen, GFP_KERNEL);
803 else
804 dest->payload.data = NULL;
805
806 return dest->payload.data;
807 }
808
i3c_ccc_cmd_dest_cleanup(struct i3c_ccc_cmd_dest * dest)809 static void i3c_ccc_cmd_dest_cleanup(struct i3c_ccc_cmd_dest *dest)
810 {
811 kfree(dest->payload.data);
812 }
813
i3c_ccc_cmd_init(struct i3c_ccc_cmd * cmd,bool rnw,u8 id,struct i3c_ccc_cmd_dest * dests,unsigned int ndests)814 static void i3c_ccc_cmd_init(struct i3c_ccc_cmd *cmd, bool rnw, u8 id,
815 struct i3c_ccc_cmd_dest *dests,
816 unsigned int ndests)
817 {
818 cmd->rnw = rnw ? 1 : 0;
819 cmd->id = id;
820 cmd->dests = dests;
821 cmd->ndests = ndests;
822 cmd->err = I3C_ERROR_UNKNOWN;
823 }
824
i3c_master_send_ccc_cmd_locked(struct i3c_master_controller * master,struct i3c_ccc_cmd * cmd)825 static int i3c_master_send_ccc_cmd_locked(struct i3c_master_controller *master,
826 struct i3c_ccc_cmd *cmd)
827 {
828 int ret;
829
830 if (!cmd || !master)
831 return -EINVAL;
832
833 if (WARN_ON(master->init_done &&
834 !rwsem_is_locked(&master->bus.lock)))
835 return -EINVAL;
836
837 if (!master->ops->send_ccc_cmd)
838 return -ENOTSUPP;
839
840 if ((cmd->id & I3C_CCC_DIRECT) && (!cmd->dests || !cmd->ndests))
841 return -EINVAL;
842
843 if (master->ops->supports_ccc_cmd &&
844 !master->ops->supports_ccc_cmd(master, cmd))
845 return -ENOTSUPP;
846
847 ret = master->ops->send_ccc_cmd(master, cmd);
848 if (ret) {
849 if (cmd->err != I3C_ERROR_UNKNOWN)
850 return cmd->err;
851
852 return ret;
853 }
854
855 return 0;
856 }
857
858 static struct i2c_dev_desc *
i3c_master_find_i2c_dev_by_addr(const struct i3c_master_controller * master,u16 addr)859 i3c_master_find_i2c_dev_by_addr(const struct i3c_master_controller *master,
860 u16 addr)
861 {
862 struct i2c_dev_desc *dev;
863
864 i3c_bus_for_each_i2cdev(&master->bus, dev) {
865 if (dev->addr == addr)
866 return dev;
867 }
868
869 return NULL;
870 }
871
872 /**
873 * i3c_master_get_free_addr() - get a free address on the bus
874 * @master: I3C master object
875 * @start_addr: where to start searching
876 *
877 * This function must be called with the bus lock held in write mode.
878 *
879 * Return: the first free address starting at @start_addr (included) or -ENOMEM
880 * if there's no more address available.
881 */
i3c_master_get_free_addr(struct i3c_master_controller * master,u8 start_addr)882 int i3c_master_get_free_addr(struct i3c_master_controller *master,
883 u8 start_addr)
884 {
885 return i3c_bus_get_free_addr(&master->bus, start_addr);
886 }
887 EXPORT_SYMBOL_GPL(i3c_master_get_free_addr);
888
i3c_device_release(struct device * dev)889 static void i3c_device_release(struct device *dev)
890 {
891 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
892
893 WARN_ON(i3cdev->desc);
894
895 of_node_put(i3cdev->dev.of_node);
896 kfree(i3cdev);
897 }
898
i3c_master_free_i3c_dev(struct i3c_dev_desc * dev)899 static void i3c_master_free_i3c_dev(struct i3c_dev_desc *dev)
900 {
901 kfree(dev);
902 }
903
904 static struct i3c_dev_desc *
i3c_master_alloc_i3c_dev(struct i3c_master_controller * master,const struct i3c_device_info * info)905 i3c_master_alloc_i3c_dev(struct i3c_master_controller *master,
906 const struct i3c_device_info *info)
907 {
908 struct i3c_dev_desc *dev;
909
910 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
911 if (!dev)
912 return ERR_PTR(-ENOMEM);
913
914 dev->common.master = master;
915 dev->info = *info;
916 mutex_init(&dev->ibi_lock);
917
918 return dev;
919 }
920
i3c_master_rstdaa_locked(struct i3c_master_controller * master,u8 addr)921 static int i3c_master_rstdaa_locked(struct i3c_master_controller *master,
922 u8 addr)
923 {
924 enum i3c_addr_slot_status addrstat;
925 struct i3c_ccc_cmd_dest dest;
926 struct i3c_ccc_cmd cmd;
927 int ret;
928
929 if (!master)
930 return -EINVAL;
931
932 addrstat = i3c_bus_get_addr_slot_status(&master->bus, addr);
933 if (addr != I3C_BROADCAST_ADDR && addrstat != I3C_ADDR_SLOT_I3C_DEV)
934 return -EINVAL;
935
936 i3c_ccc_cmd_dest_init(&dest, addr, 0);
937 i3c_ccc_cmd_init(&cmd, false,
938 I3C_CCC_RSTDAA(addr == I3C_BROADCAST_ADDR),
939 &dest, 1);
940 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
941 i3c_ccc_cmd_dest_cleanup(&dest);
942
943 return ret;
944 }
945
946 /**
947 * i3c_master_entdaa_locked() - start a DAA (Dynamic Address Assignment)
948 * procedure
949 * @master: master used to send frames on the bus
950 *
951 * Send a ENTDAA CCC command to start a DAA procedure.
952 *
953 * Note that this function only sends the ENTDAA CCC command, all the logic
954 * behind dynamic address assignment has to be handled in the I3C master
955 * driver.
956 *
957 * This function must be called with the bus lock held in write mode.
958 *
959 * Return: 0 in case of success, a positive I3C error code if the error is
960 * one of the official Mx error codes, and a negative error code otherwise.
961 */
i3c_master_entdaa_locked(struct i3c_master_controller * master)962 int i3c_master_entdaa_locked(struct i3c_master_controller *master)
963 {
964 struct i3c_ccc_cmd_dest dest;
965 struct i3c_ccc_cmd cmd;
966 int ret;
967
968 i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 0);
969 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_ENTDAA, &dest, 1);
970 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
971 i3c_ccc_cmd_dest_cleanup(&dest);
972
973 return ret;
974 }
975 EXPORT_SYMBOL_GPL(i3c_master_entdaa_locked);
976
i3c_master_enec_disec_locked(struct i3c_master_controller * master,u8 addr,bool enable,u8 evts)977 static int i3c_master_enec_disec_locked(struct i3c_master_controller *master,
978 u8 addr, bool enable, u8 evts)
979 {
980 struct i3c_ccc_events *events;
981 struct i3c_ccc_cmd_dest dest;
982 struct i3c_ccc_cmd cmd;
983 int ret;
984
985 events = i3c_ccc_cmd_dest_init(&dest, addr, sizeof(*events));
986 if (!events)
987 return -ENOMEM;
988
989 events->events = evts;
990 i3c_ccc_cmd_init(&cmd, false,
991 enable ?
992 I3C_CCC_ENEC(addr == I3C_BROADCAST_ADDR) :
993 I3C_CCC_DISEC(addr == I3C_BROADCAST_ADDR),
994 &dest, 1);
995 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
996 i3c_ccc_cmd_dest_cleanup(&dest);
997
998 return ret;
999 }
1000
1001 /**
1002 * i3c_master_disec_locked() - send a DISEC CCC command
1003 * @master: master used to send frames on the bus
1004 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
1005 * @evts: events to disable
1006 *
1007 * Send a DISEC CCC command to disable some or all events coming from a
1008 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
1009 *
1010 * This function must be called with the bus lock held in write mode.
1011 *
1012 * Return: 0 in case of success, a positive I3C error code if the error is
1013 * one of the official Mx error codes, and a negative error code otherwise.
1014 */
i3c_master_disec_locked(struct i3c_master_controller * master,u8 addr,u8 evts)1015 int i3c_master_disec_locked(struct i3c_master_controller *master, u8 addr,
1016 u8 evts)
1017 {
1018 return i3c_master_enec_disec_locked(master, addr, false, evts);
1019 }
1020 EXPORT_SYMBOL_GPL(i3c_master_disec_locked);
1021
1022 /**
1023 * i3c_master_enec_locked() - send an ENEC CCC command
1024 * @master: master used to send frames on the bus
1025 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
1026 * @evts: events to disable
1027 *
1028 * Sends an ENEC CCC command to enable some or all events coming from a
1029 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
1030 *
1031 * This function must be called with the bus lock held in write mode.
1032 *
1033 * Return: 0 in case of success, a positive I3C error code if the error is
1034 * one of the official Mx error codes, and a negative error code otherwise.
1035 */
i3c_master_enec_locked(struct i3c_master_controller * master,u8 addr,u8 evts)1036 int i3c_master_enec_locked(struct i3c_master_controller *master, u8 addr,
1037 u8 evts)
1038 {
1039 return i3c_master_enec_disec_locked(master, addr, true, evts);
1040 }
1041 EXPORT_SYMBOL_GPL(i3c_master_enec_locked);
1042
1043 /**
1044 * i3c_master_defslvs_locked() - send a DEFSLVS CCC command
1045 * @master: master used to send frames on the bus
1046 *
1047 * Send a DEFSLVS CCC command containing all the devices known to the @master.
1048 * This is useful when you have secondary masters on the bus to propagate
1049 * device information.
1050 *
1051 * This should be called after all I3C devices have been discovered (in other
1052 * words, after the DAA procedure has finished) and instantiated in
1053 * &i3c_master_controller_ops->bus_init().
1054 * It should also be called if a master ACKed an Hot-Join request and assigned
1055 * a dynamic address to the device joining the bus.
1056 *
1057 * This function must be called with the bus lock held in write mode.
1058 *
1059 * Return: 0 in case of success, a positive I3C error code if the error is
1060 * one of the official Mx error codes, and a negative error code otherwise.
1061 */
i3c_master_defslvs_locked(struct i3c_master_controller * master)1062 int i3c_master_defslvs_locked(struct i3c_master_controller *master)
1063 {
1064 struct i3c_ccc_defslvs *defslvs;
1065 struct i3c_ccc_dev_desc *desc;
1066 struct i3c_ccc_cmd_dest dest;
1067 struct i3c_dev_desc *i3cdev;
1068 struct i2c_dev_desc *i2cdev;
1069 struct i3c_ccc_cmd cmd;
1070 struct i3c_bus *bus;
1071 bool send = false;
1072 int ndevs = 0, ret;
1073
1074 if (!master)
1075 return -EINVAL;
1076
1077 bus = i3c_master_get_bus(master);
1078 i3c_bus_for_each_i3cdev(bus, i3cdev) {
1079 ndevs++;
1080
1081 if (i3cdev == master->this)
1082 continue;
1083
1084 if (I3C_BCR_DEVICE_ROLE(i3cdev->info.bcr) ==
1085 I3C_BCR_I3C_MASTER)
1086 send = true;
1087 }
1088
1089 /* No other master on the bus, skip DEFSLVS. */
1090 if (!send)
1091 return 0;
1092
1093 i3c_bus_for_each_i2cdev(bus, i2cdev)
1094 ndevs++;
1095
1096 defslvs = i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR,
1097 struct_size(defslvs, slaves,
1098 ndevs - 1));
1099 if (!defslvs)
1100 return -ENOMEM;
1101
1102 defslvs->count = ndevs;
1103 defslvs->master.bcr = master->this->info.bcr;
1104 defslvs->master.dcr = master->this->info.dcr;
1105 defslvs->master.dyn_addr = master->this->info.dyn_addr << 1;
1106 defslvs->master.static_addr = I3C_BROADCAST_ADDR << 1;
1107
1108 desc = defslvs->slaves;
1109 i3c_bus_for_each_i2cdev(bus, i2cdev) {
1110 desc->lvr = i2cdev->lvr;
1111 desc->static_addr = i2cdev->addr << 1;
1112 desc++;
1113 }
1114
1115 i3c_bus_for_each_i3cdev(bus, i3cdev) {
1116 /* Skip the I3C dev representing this master. */
1117 if (i3cdev == master->this)
1118 continue;
1119
1120 desc->bcr = i3cdev->info.bcr;
1121 desc->dcr = i3cdev->info.dcr;
1122 desc->dyn_addr = i3cdev->info.dyn_addr << 1;
1123 desc->static_addr = i3cdev->info.static_addr << 1;
1124 desc++;
1125 }
1126
1127 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_DEFSLVS, &dest, 1);
1128 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1129 i3c_ccc_cmd_dest_cleanup(&dest);
1130
1131 return ret;
1132 }
1133 EXPORT_SYMBOL_GPL(i3c_master_defslvs_locked);
1134
i3c_master_setda_locked(struct i3c_master_controller * master,u8 oldaddr,u8 newaddr,bool setdasa)1135 static int i3c_master_setda_locked(struct i3c_master_controller *master,
1136 u8 oldaddr, u8 newaddr, bool setdasa)
1137 {
1138 struct i3c_ccc_cmd_dest dest;
1139 struct i3c_ccc_setda *setda;
1140 struct i3c_ccc_cmd cmd;
1141 int ret;
1142
1143 if (!oldaddr || !newaddr)
1144 return -EINVAL;
1145
1146 setda = i3c_ccc_cmd_dest_init(&dest, oldaddr, sizeof(*setda));
1147 if (!setda)
1148 return -ENOMEM;
1149
1150 setda->addr = newaddr << 1;
1151 i3c_ccc_cmd_init(&cmd, false,
1152 setdasa ? I3C_CCC_SETDASA : I3C_CCC_SETNEWDA,
1153 &dest, 1);
1154 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1155 i3c_ccc_cmd_dest_cleanup(&dest);
1156
1157 return ret;
1158 }
1159
i3c_master_setdasa_locked(struct i3c_master_controller * master,u8 static_addr,u8 dyn_addr)1160 static int i3c_master_setdasa_locked(struct i3c_master_controller *master,
1161 u8 static_addr, u8 dyn_addr)
1162 {
1163 return i3c_master_setda_locked(master, static_addr, dyn_addr, true);
1164 }
1165
i3c_master_setnewda_locked(struct i3c_master_controller * master,u8 oldaddr,u8 newaddr)1166 static int i3c_master_setnewda_locked(struct i3c_master_controller *master,
1167 u8 oldaddr, u8 newaddr)
1168 {
1169 return i3c_master_setda_locked(master, oldaddr, newaddr, false);
1170 }
1171
i3c_master_getmrl_locked(struct i3c_master_controller * master,struct i3c_device_info * info)1172 static int i3c_master_getmrl_locked(struct i3c_master_controller *master,
1173 struct i3c_device_info *info)
1174 {
1175 struct i3c_ccc_cmd_dest dest;
1176 struct i3c_ccc_mrl *mrl;
1177 struct i3c_ccc_cmd cmd;
1178 int ret;
1179
1180 mrl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mrl));
1181 if (!mrl)
1182 return -ENOMEM;
1183
1184 /*
1185 * When the device does not have IBI payload GETMRL only returns 2
1186 * bytes of data.
1187 */
1188 if (!(info->bcr & I3C_BCR_IBI_PAYLOAD))
1189 dest.payload.len -= 1;
1190
1191 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMRL, &dest, 1);
1192 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1193 if (ret)
1194 goto out;
1195
1196 switch (dest.payload.len) {
1197 case 3:
1198 info->max_ibi_len = mrl->ibi_len;
1199 fallthrough;
1200 case 2:
1201 info->max_read_len = be16_to_cpu(mrl->read_len);
1202 break;
1203 default:
1204 ret = -EIO;
1205 goto out;
1206 }
1207
1208 out:
1209 i3c_ccc_cmd_dest_cleanup(&dest);
1210
1211 return ret;
1212 }
1213
i3c_master_getmwl_locked(struct i3c_master_controller * master,struct i3c_device_info * info)1214 static int i3c_master_getmwl_locked(struct i3c_master_controller *master,
1215 struct i3c_device_info *info)
1216 {
1217 struct i3c_ccc_cmd_dest dest;
1218 struct i3c_ccc_mwl *mwl;
1219 struct i3c_ccc_cmd cmd;
1220 int ret;
1221
1222 mwl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mwl));
1223 if (!mwl)
1224 return -ENOMEM;
1225
1226 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMWL, &dest, 1);
1227 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1228 if (ret)
1229 goto out;
1230
1231 if (dest.payload.len != sizeof(*mwl)) {
1232 ret = -EIO;
1233 goto out;
1234 }
1235
1236 info->max_write_len = be16_to_cpu(mwl->len);
1237
1238 out:
1239 i3c_ccc_cmd_dest_cleanup(&dest);
1240
1241 return ret;
1242 }
1243
i3c_master_getmxds_locked(struct i3c_master_controller * master,struct i3c_device_info * info)1244 static int i3c_master_getmxds_locked(struct i3c_master_controller *master,
1245 struct i3c_device_info *info)
1246 {
1247 struct i3c_ccc_getmxds *getmaxds;
1248 struct i3c_ccc_cmd_dest dest;
1249 struct i3c_ccc_cmd cmd;
1250 int ret;
1251
1252 getmaxds = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
1253 sizeof(*getmaxds));
1254 if (!getmaxds)
1255 return -ENOMEM;
1256
1257 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMXDS, &dest, 1);
1258 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1259 if (ret)
1260 goto out;
1261
1262 if (dest.payload.len != 2 && dest.payload.len != 5) {
1263 ret = -EIO;
1264 goto out;
1265 }
1266
1267 info->max_read_ds = getmaxds->maxrd;
1268 info->max_write_ds = getmaxds->maxwr;
1269 if (dest.payload.len == 5)
1270 info->max_read_turnaround = getmaxds->maxrdturn[0] |
1271 ((u32)getmaxds->maxrdturn[1] << 8) |
1272 ((u32)getmaxds->maxrdturn[2] << 16);
1273
1274 out:
1275 i3c_ccc_cmd_dest_cleanup(&dest);
1276
1277 return ret;
1278 }
1279
i3c_master_gethdrcap_locked(struct i3c_master_controller * master,struct i3c_device_info * info)1280 static int i3c_master_gethdrcap_locked(struct i3c_master_controller *master,
1281 struct i3c_device_info *info)
1282 {
1283 struct i3c_ccc_gethdrcap *gethdrcap;
1284 struct i3c_ccc_cmd_dest dest;
1285 struct i3c_ccc_cmd cmd;
1286 int ret;
1287
1288 gethdrcap = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
1289 sizeof(*gethdrcap));
1290 if (!gethdrcap)
1291 return -ENOMEM;
1292
1293 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETHDRCAP, &dest, 1);
1294 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1295 if (ret)
1296 goto out;
1297
1298 if (dest.payload.len != 1) {
1299 ret = -EIO;
1300 goto out;
1301 }
1302
1303 info->hdr_cap = gethdrcap->modes;
1304
1305 out:
1306 i3c_ccc_cmd_dest_cleanup(&dest);
1307
1308 return ret;
1309 }
1310
i3c_master_getpid_locked(struct i3c_master_controller * master,struct i3c_device_info * info)1311 static int i3c_master_getpid_locked(struct i3c_master_controller *master,
1312 struct i3c_device_info *info)
1313 {
1314 struct i3c_ccc_getpid *getpid;
1315 struct i3c_ccc_cmd_dest dest;
1316 struct i3c_ccc_cmd cmd;
1317 int ret, i;
1318
1319 getpid = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getpid));
1320 if (!getpid)
1321 return -ENOMEM;
1322
1323 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETPID, &dest, 1);
1324 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1325 if (ret)
1326 goto out;
1327
1328 info->pid = 0;
1329 for (i = 0; i < sizeof(getpid->pid); i++) {
1330 int sft = (sizeof(getpid->pid) - i - 1) * 8;
1331
1332 info->pid |= (u64)getpid->pid[i] << sft;
1333 }
1334
1335 out:
1336 i3c_ccc_cmd_dest_cleanup(&dest);
1337
1338 return ret;
1339 }
1340
i3c_master_getbcr_locked(struct i3c_master_controller * master,struct i3c_device_info * info)1341 static int i3c_master_getbcr_locked(struct i3c_master_controller *master,
1342 struct i3c_device_info *info)
1343 {
1344 struct i3c_ccc_getbcr *getbcr;
1345 struct i3c_ccc_cmd_dest dest;
1346 struct i3c_ccc_cmd cmd;
1347 int ret;
1348
1349 getbcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getbcr));
1350 if (!getbcr)
1351 return -ENOMEM;
1352
1353 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETBCR, &dest, 1);
1354 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1355 if (ret)
1356 goto out;
1357
1358 info->bcr = getbcr->bcr;
1359
1360 out:
1361 i3c_ccc_cmd_dest_cleanup(&dest);
1362
1363 return ret;
1364 }
1365
i3c_master_getdcr_locked(struct i3c_master_controller * master,struct i3c_device_info * info)1366 static int i3c_master_getdcr_locked(struct i3c_master_controller *master,
1367 struct i3c_device_info *info)
1368 {
1369 struct i3c_ccc_getdcr *getdcr;
1370 struct i3c_ccc_cmd_dest dest;
1371 struct i3c_ccc_cmd cmd;
1372 int ret;
1373
1374 getdcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getdcr));
1375 if (!getdcr)
1376 return -ENOMEM;
1377
1378 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETDCR, &dest, 1);
1379 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1380 if (ret)
1381 goto out;
1382
1383 info->dcr = getdcr->dcr;
1384
1385 out:
1386 i3c_ccc_cmd_dest_cleanup(&dest);
1387
1388 return ret;
1389 }
1390
i3c_master_retrieve_dev_info(struct i3c_dev_desc * dev)1391 static int i3c_master_retrieve_dev_info(struct i3c_dev_desc *dev)
1392 {
1393 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1394 enum i3c_addr_slot_status slot_status;
1395 int ret;
1396
1397 if (!dev->info.dyn_addr)
1398 return -EINVAL;
1399
1400 slot_status = i3c_bus_get_addr_slot_status(&master->bus,
1401 dev->info.dyn_addr);
1402 if (slot_status == I3C_ADDR_SLOT_RSVD ||
1403 slot_status == I3C_ADDR_SLOT_I2C_DEV)
1404 return -EINVAL;
1405
1406 ret = i3c_master_getpid_locked(master, &dev->info);
1407 if (ret)
1408 return ret;
1409
1410 ret = i3c_master_getbcr_locked(master, &dev->info);
1411 if (ret)
1412 return ret;
1413
1414 ret = i3c_master_getdcr_locked(master, &dev->info);
1415 if (ret)
1416 return ret;
1417
1418 if (dev->info.bcr & I3C_BCR_MAX_DATA_SPEED_LIM) {
1419 ret = i3c_master_getmxds_locked(master, &dev->info);
1420 if (ret)
1421 return ret;
1422 }
1423
1424 if (dev->info.bcr & I3C_BCR_IBI_PAYLOAD)
1425 dev->info.max_ibi_len = 1;
1426
1427 i3c_master_getmrl_locked(master, &dev->info);
1428 i3c_master_getmwl_locked(master, &dev->info);
1429
1430 if (dev->info.bcr & I3C_BCR_HDR_CAP) {
1431 ret = i3c_master_gethdrcap_locked(master, &dev->info);
1432 if (ret)
1433 return ret;
1434 }
1435
1436 return 0;
1437 }
1438
i3c_master_put_i3c_addrs(struct i3c_dev_desc * dev)1439 static void i3c_master_put_i3c_addrs(struct i3c_dev_desc *dev)
1440 {
1441 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1442
1443 if (dev->info.static_addr)
1444 i3c_bus_set_addr_slot_status(&master->bus,
1445 dev->info.static_addr,
1446 I3C_ADDR_SLOT_FREE);
1447
1448 if (dev->info.dyn_addr)
1449 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1450 I3C_ADDR_SLOT_FREE);
1451
1452 if (dev->boardinfo && dev->boardinfo->init_dyn_addr)
1453 i3c_bus_set_addr_slot_status(&master->bus, dev->boardinfo->init_dyn_addr,
1454 I3C_ADDR_SLOT_FREE);
1455 }
1456
i3c_master_get_i3c_addrs(struct i3c_dev_desc * dev)1457 static int i3c_master_get_i3c_addrs(struct i3c_dev_desc *dev)
1458 {
1459 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1460 enum i3c_addr_slot_status status;
1461
1462 if (!dev->info.static_addr && !dev->info.dyn_addr)
1463 return 0;
1464
1465 if (dev->info.static_addr) {
1466 status = i3c_bus_get_addr_slot_status(&master->bus,
1467 dev->info.static_addr);
1468 /* Since static address and assigned dynamic address can be
1469 * equal, allow this case to pass.
1470 */
1471 if (status != I3C_ADDR_SLOT_FREE &&
1472 dev->info.static_addr != dev->boardinfo->init_dyn_addr)
1473 return -EBUSY;
1474
1475 i3c_bus_set_addr_slot_status(&master->bus,
1476 dev->info.static_addr,
1477 I3C_ADDR_SLOT_I3C_DEV);
1478 }
1479
1480 /*
1481 * ->init_dyn_addr should have been reserved before that, so, if we're
1482 * trying to apply a pre-reserved dynamic address, we should not try
1483 * to reserve the address slot a second time.
1484 */
1485 if (dev->info.dyn_addr &&
1486 (!dev->boardinfo ||
1487 dev->boardinfo->init_dyn_addr != dev->info.dyn_addr)) {
1488 status = i3c_bus_get_addr_slot_status(&master->bus,
1489 dev->info.dyn_addr);
1490 if (status != I3C_ADDR_SLOT_FREE)
1491 goto err_release_static_addr;
1492
1493 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1494 I3C_ADDR_SLOT_I3C_DEV);
1495 }
1496
1497 return 0;
1498
1499 err_release_static_addr:
1500 if (dev->info.static_addr)
1501 i3c_bus_set_addr_slot_status(&master->bus,
1502 dev->info.static_addr,
1503 I3C_ADDR_SLOT_FREE);
1504
1505 return -EBUSY;
1506 }
1507
i3c_master_attach_i3c_dev(struct i3c_master_controller * master,struct i3c_dev_desc * dev)1508 static int i3c_master_attach_i3c_dev(struct i3c_master_controller *master,
1509 struct i3c_dev_desc *dev)
1510 {
1511 int ret;
1512
1513 /*
1514 * We don't attach devices to the controller until they are
1515 * addressable on the bus.
1516 */
1517 if (!dev->info.static_addr && !dev->info.dyn_addr)
1518 return 0;
1519
1520 ret = i3c_master_get_i3c_addrs(dev);
1521 if (ret)
1522 return ret;
1523
1524 /* Do not attach the master device itself. */
1525 if (master->this != dev && master->ops->attach_i3c_dev) {
1526 ret = master->ops->attach_i3c_dev(dev);
1527 if (ret) {
1528 i3c_master_put_i3c_addrs(dev);
1529 return ret;
1530 }
1531 }
1532
1533 list_add_tail(&dev->common.node, &master->bus.devs.i3c);
1534
1535 return 0;
1536 }
1537
i3c_master_reattach_i3c_dev(struct i3c_dev_desc * dev,u8 old_dyn_addr)1538 static int i3c_master_reattach_i3c_dev(struct i3c_dev_desc *dev,
1539 u8 old_dyn_addr)
1540 {
1541 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1542 int ret;
1543
1544 if (dev->info.dyn_addr != old_dyn_addr) {
1545 i3c_bus_set_addr_slot_status(&master->bus,
1546 dev->info.dyn_addr,
1547 I3C_ADDR_SLOT_I3C_DEV);
1548 if (old_dyn_addr)
1549 i3c_bus_set_addr_slot_status(&master->bus, old_dyn_addr,
1550 I3C_ADDR_SLOT_FREE);
1551 }
1552
1553 if (master->ops->reattach_i3c_dev) {
1554 ret = master->ops->reattach_i3c_dev(dev, old_dyn_addr);
1555 if (ret) {
1556 i3c_master_put_i3c_addrs(dev);
1557 return ret;
1558 }
1559 }
1560
1561 return 0;
1562 }
1563
i3c_master_detach_i3c_dev(struct i3c_dev_desc * dev)1564 static void i3c_master_detach_i3c_dev(struct i3c_dev_desc *dev)
1565 {
1566 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1567
1568 /* Do not detach the master device itself. */
1569 if (master->this != dev && master->ops->detach_i3c_dev)
1570 master->ops->detach_i3c_dev(dev);
1571
1572 i3c_master_put_i3c_addrs(dev);
1573 list_del(&dev->common.node);
1574 }
1575
i3c_master_attach_i2c_dev(struct i3c_master_controller * master,struct i2c_dev_desc * dev)1576 static int i3c_master_attach_i2c_dev(struct i3c_master_controller *master,
1577 struct i2c_dev_desc *dev)
1578 {
1579 int ret;
1580
1581 if (master->ops->attach_i2c_dev) {
1582 ret = master->ops->attach_i2c_dev(dev);
1583 if (ret)
1584 return ret;
1585 }
1586
1587 list_add_tail(&dev->common.node, &master->bus.devs.i2c);
1588
1589 return 0;
1590 }
1591
i3c_master_detach_i2c_dev(struct i2c_dev_desc * dev)1592 static void i3c_master_detach_i2c_dev(struct i2c_dev_desc *dev)
1593 {
1594 struct i3c_master_controller *master = i2c_dev_get_master(dev);
1595
1596 list_del(&dev->common.node);
1597
1598 if (master->ops->detach_i2c_dev)
1599 master->ops->detach_i2c_dev(dev);
1600 }
1601
i3c_master_early_i3c_dev_add(struct i3c_master_controller * master,struct i3c_dev_boardinfo * boardinfo)1602 static int i3c_master_early_i3c_dev_add(struct i3c_master_controller *master,
1603 struct i3c_dev_boardinfo *boardinfo)
1604 {
1605 struct i3c_device_info info = {
1606 .static_addr = boardinfo->static_addr,
1607 .pid = boardinfo->pid,
1608 };
1609 struct i3c_dev_desc *i3cdev;
1610 int ret;
1611
1612 i3cdev = i3c_master_alloc_i3c_dev(master, &info);
1613 if (IS_ERR(i3cdev))
1614 return -ENOMEM;
1615
1616 i3cdev->boardinfo = boardinfo;
1617
1618 ret = i3c_master_attach_i3c_dev(master, i3cdev);
1619 if (ret)
1620 goto err_free_dev;
1621
1622 ret = i3c_master_setdasa_locked(master, i3cdev->info.static_addr,
1623 i3cdev->boardinfo->init_dyn_addr);
1624 if (ret)
1625 goto err_detach_dev;
1626
1627 i3cdev->info.dyn_addr = i3cdev->boardinfo->init_dyn_addr;
1628 ret = i3c_master_reattach_i3c_dev(i3cdev, 0);
1629 if (ret)
1630 goto err_rstdaa;
1631
1632 ret = i3c_master_retrieve_dev_info(i3cdev);
1633 if (ret)
1634 goto err_rstdaa;
1635
1636 return 0;
1637
1638 err_rstdaa:
1639 i3c_master_rstdaa_locked(master, i3cdev->boardinfo->init_dyn_addr);
1640 err_detach_dev:
1641 i3c_master_detach_i3c_dev(i3cdev);
1642 err_free_dev:
1643 i3c_master_free_i3c_dev(i3cdev);
1644
1645 return ret;
1646 }
1647
1648 static void
i3c_master_register_new_i3c_devs(struct i3c_master_controller * master)1649 i3c_master_register_new_i3c_devs(struct i3c_master_controller *master)
1650 {
1651 struct i3c_dev_desc *desc;
1652 int ret;
1653
1654 if (!master->init_done)
1655 return;
1656
1657 i3c_bus_for_each_i3cdev(&master->bus, desc) {
1658 if (desc->dev || !desc->info.dyn_addr || desc == master->this)
1659 continue;
1660
1661 desc->dev = kzalloc(sizeof(*desc->dev), GFP_KERNEL);
1662 if (!desc->dev)
1663 continue;
1664
1665 desc->dev->bus = &master->bus;
1666 desc->dev->desc = desc;
1667 desc->dev->dev.parent = &master->dev;
1668 desc->dev->dev.type = &i3c_device_type;
1669 desc->dev->dev.bus = &i3c_bus_type;
1670 desc->dev->dev.release = i3c_device_release;
1671 dev_set_name(&desc->dev->dev, "%d-%llx", master->bus.id,
1672 desc->info.pid);
1673
1674 if (desc->boardinfo)
1675 desc->dev->dev.of_node = desc->boardinfo->of_node;
1676
1677 ret = device_register(&desc->dev->dev);
1678 if (ret) {
1679 dev_err(&master->dev,
1680 "Failed to add I3C device (err = %d)\n", ret);
1681 put_device(&desc->dev->dev);
1682 }
1683 }
1684 }
1685
1686 /**
1687 * i3c_master_do_daa() - do a DAA (Dynamic Address Assignment)
1688 * @master: master doing the DAA
1689 *
1690 * This function is instantiating an I3C device object and adding it to the
1691 * I3C device list. All device information are automatically retrieved using
1692 * standard CCC commands.
1693 *
1694 * The I3C device object is returned in case the master wants to attach
1695 * private data to it using i3c_dev_set_master_data().
1696 *
1697 * This function must be called with the bus lock held in write mode.
1698 *
1699 * Return: a 0 in case of success, an negative error code otherwise.
1700 */
i3c_master_do_daa(struct i3c_master_controller * master)1701 int i3c_master_do_daa(struct i3c_master_controller *master)
1702 {
1703 int ret;
1704
1705 i3c_bus_maintenance_lock(&master->bus);
1706 ret = master->ops->do_daa(master);
1707 i3c_bus_maintenance_unlock(&master->bus);
1708
1709 if (ret)
1710 return ret;
1711
1712 i3c_bus_normaluse_lock(&master->bus);
1713 i3c_master_register_new_i3c_devs(master);
1714 i3c_bus_normaluse_unlock(&master->bus);
1715
1716 return 0;
1717 }
1718 EXPORT_SYMBOL_GPL(i3c_master_do_daa);
1719
1720 /**
1721 * i3c_master_set_info() - set master device information
1722 * @master: master used to send frames on the bus
1723 * @info: I3C device information
1724 *
1725 * Set master device info. This should be called from
1726 * &i3c_master_controller_ops->bus_init().
1727 *
1728 * Not all &i3c_device_info fields are meaningful for a master device.
1729 * Here is a list of fields that should be properly filled:
1730 *
1731 * - &i3c_device_info->dyn_addr
1732 * - &i3c_device_info->bcr
1733 * - &i3c_device_info->dcr
1734 * - &i3c_device_info->pid
1735 * - &i3c_device_info->hdr_cap if %I3C_BCR_HDR_CAP bit is set in
1736 * &i3c_device_info->bcr
1737 *
1738 * This function must be called with the bus lock held in maintenance mode.
1739 *
1740 * Return: 0 if @info contains valid information (not every piece of
1741 * information can be checked, but we can at least make sure @info->dyn_addr
1742 * and @info->bcr are correct), -EINVAL otherwise.
1743 */
i3c_master_set_info(struct i3c_master_controller * master,const struct i3c_device_info * info)1744 int i3c_master_set_info(struct i3c_master_controller *master,
1745 const struct i3c_device_info *info)
1746 {
1747 struct i3c_dev_desc *i3cdev;
1748 int ret;
1749
1750 if (!i3c_bus_dev_addr_is_avail(&master->bus, info->dyn_addr))
1751 return -EINVAL;
1752
1753 if (I3C_BCR_DEVICE_ROLE(info->bcr) == I3C_BCR_I3C_MASTER &&
1754 master->secondary)
1755 return -EINVAL;
1756
1757 if (master->this)
1758 return -EINVAL;
1759
1760 i3cdev = i3c_master_alloc_i3c_dev(master, info);
1761 if (IS_ERR(i3cdev))
1762 return PTR_ERR(i3cdev);
1763
1764 master->this = i3cdev;
1765 master->bus.cur_master = master->this;
1766
1767 ret = i3c_master_attach_i3c_dev(master, i3cdev);
1768 if (ret)
1769 goto err_free_dev;
1770
1771 return 0;
1772
1773 err_free_dev:
1774 i3c_master_free_i3c_dev(i3cdev);
1775
1776 return ret;
1777 }
1778 EXPORT_SYMBOL_GPL(i3c_master_set_info);
1779
i3c_master_detach_free_devs(struct i3c_master_controller * master)1780 static void i3c_master_detach_free_devs(struct i3c_master_controller *master)
1781 {
1782 struct i3c_dev_desc *i3cdev, *i3ctmp;
1783 struct i2c_dev_desc *i2cdev, *i2ctmp;
1784
1785 list_for_each_entry_safe(i3cdev, i3ctmp, &master->bus.devs.i3c,
1786 common.node) {
1787 i3c_master_detach_i3c_dev(i3cdev);
1788
1789 if (i3cdev->boardinfo && i3cdev->boardinfo->init_dyn_addr)
1790 i3c_bus_set_addr_slot_status(&master->bus,
1791 i3cdev->boardinfo->init_dyn_addr,
1792 I3C_ADDR_SLOT_FREE);
1793
1794 i3c_master_free_i3c_dev(i3cdev);
1795 }
1796
1797 list_for_each_entry_safe(i2cdev, i2ctmp, &master->bus.devs.i2c,
1798 common.node) {
1799 i3c_master_detach_i2c_dev(i2cdev);
1800 i3c_bus_set_addr_slot_status(&master->bus,
1801 i2cdev->addr,
1802 I3C_ADDR_SLOT_FREE);
1803 i3c_master_free_i2c_dev(i2cdev);
1804 }
1805 }
1806
1807 /**
1808 * i3c_master_bus_init() - initialize an I3C bus
1809 * @master: main master initializing the bus
1810 *
1811 * This function is following all initialisation steps described in the I3C
1812 * specification:
1813 *
1814 * 1. Attach I2C devs to the master so that the master can fill its internal
1815 * device table appropriately
1816 *
1817 * 2. Call &i3c_master_controller_ops->bus_init() method to initialize
1818 * the master controller. That's usually where the bus mode is selected
1819 * (pure bus or mixed fast/slow bus)
1820 *
1821 * 3. Instruct all devices on the bus to drop their dynamic address. This is
1822 * particularly important when the bus was previously configured by someone
1823 * else (for example the bootloader)
1824 *
1825 * 4. Disable all slave events.
1826 *
1827 * 5. Reserve address slots for I3C devices with init_dyn_addr. And if devices
1828 * also have static_addr, try to pre-assign dynamic addresses requested by
1829 * the FW with SETDASA and attach corresponding statically defined I3C
1830 * devices to the master.
1831 *
1832 * 6. Do a DAA (Dynamic Address Assignment) to assign dynamic addresses to all
1833 * remaining I3C devices
1834 *
1835 * Once this is done, all I3C and I2C devices should be usable.
1836 *
1837 * Return: a 0 in case of success, an negative error code otherwise.
1838 */
i3c_master_bus_init(struct i3c_master_controller * master)1839 static int i3c_master_bus_init(struct i3c_master_controller *master)
1840 {
1841 enum i3c_addr_slot_status status;
1842 struct i2c_dev_boardinfo *i2cboardinfo;
1843 struct i3c_dev_boardinfo *i3cboardinfo;
1844 struct i2c_dev_desc *i2cdev;
1845 int ret;
1846
1847 /*
1848 * First attach all devices with static definitions provided by the
1849 * FW.
1850 */
1851 list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) {
1852 status = i3c_bus_get_addr_slot_status(&master->bus,
1853 i2cboardinfo->base.addr);
1854 if (status != I3C_ADDR_SLOT_FREE) {
1855 ret = -EBUSY;
1856 goto err_detach_devs;
1857 }
1858
1859 i3c_bus_set_addr_slot_status(&master->bus,
1860 i2cboardinfo->base.addr,
1861 I3C_ADDR_SLOT_I2C_DEV);
1862
1863 i2cdev = i3c_master_alloc_i2c_dev(master,
1864 i2cboardinfo->base.addr,
1865 i2cboardinfo->lvr);
1866 if (IS_ERR(i2cdev)) {
1867 ret = PTR_ERR(i2cdev);
1868 goto err_detach_devs;
1869 }
1870
1871 ret = i3c_master_attach_i2c_dev(master, i2cdev);
1872 if (ret) {
1873 i3c_master_free_i2c_dev(i2cdev);
1874 goto err_detach_devs;
1875 }
1876 }
1877
1878 /*
1879 * Now execute the controller specific ->bus_init() routine, which
1880 * might configure its internal logic to match the bus limitations.
1881 */
1882 ret = master->ops->bus_init(master);
1883 if (ret)
1884 goto err_detach_devs;
1885
1886 /*
1887 * The master device should have been instantiated in ->bus_init(),
1888 * complain if this was not the case.
1889 */
1890 if (!master->this) {
1891 dev_err(&master->dev,
1892 "master_set_info() was not called in ->bus_init()\n");
1893 ret = -EINVAL;
1894 goto err_bus_cleanup;
1895 }
1896
1897 if (master->ops->set_speed) {
1898 ret = master->ops->set_speed(master, I3C_OPEN_DRAIN_SLOW_SPEED);
1899 if (ret)
1900 goto err_bus_cleanup;
1901 }
1902
1903 /*
1904 * Reset all dynamic address that may have been assigned before
1905 * (assigned by the bootloader for example).
1906 */
1907 ret = i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
1908 if (ret && ret != I3C_ERROR_M2)
1909 goto err_bus_cleanup;
1910
1911 if (master->ops->set_speed) {
1912 master->ops->set_speed(master, I3C_OPEN_DRAIN_NORMAL_SPEED);
1913 if (ret)
1914 goto err_bus_cleanup;
1915 }
1916
1917 /* Disable all slave events before starting DAA. */
1918 ret = i3c_master_disec_locked(master, I3C_BROADCAST_ADDR,
1919 I3C_CCC_EVENT_SIR | I3C_CCC_EVENT_MR |
1920 I3C_CCC_EVENT_HJ);
1921 if (ret && ret != I3C_ERROR_M2)
1922 goto err_bus_cleanup;
1923
1924 /*
1925 * Reserve init_dyn_addr first, and then try to pre-assign dynamic
1926 * address and retrieve device information if needed.
1927 * In case pre-assign dynamic address fails, setting dynamic address to
1928 * the requested init_dyn_addr is retried after DAA is done in
1929 * i3c_master_add_i3c_dev_locked().
1930 */
1931 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) {
1932
1933 /*
1934 * We don't reserve a dynamic address for devices that
1935 * don't explicitly request one.
1936 */
1937 if (!i3cboardinfo->init_dyn_addr)
1938 continue;
1939
1940 ret = i3c_bus_get_addr_slot_status(&master->bus,
1941 i3cboardinfo->init_dyn_addr);
1942 if (ret != I3C_ADDR_SLOT_FREE) {
1943 ret = -EBUSY;
1944 goto err_rstdaa;
1945 }
1946
1947 /* Do not mark as occupied until real device exist in bus */
1948 i3c_bus_set_addr_slot_status_mask(&master->bus,
1949 i3cboardinfo->init_dyn_addr,
1950 I3C_ADDR_SLOT_EXT_DESIRED,
1951 I3C_ADDR_SLOT_EXT_STATUS_MASK);
1952
1953 /*
1954 * Only try to create/attach devices that have a static
1955 * address. Other devices will be created/attached when
1956 * DAA happens, and the requested dynamic address will
1957 * be set using SETNEWDA once those devices become
1958 * addressable.
1959 */
1960
1961 if (i3cboardinfo->static_addr)
1962 i3c_master_early_i3c_dev_add(master, i3cboardinfo);
1963 }
1964
1965 ret = i3c_master_do_daa(master);
1966 if (ret)
1967 goto err_rstdaa;
1968
1969 return 0;
1970
1971 err_rstdaa:
1972 i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
1973
1974 err_bus_cleanup:
1975 if (master->ops->bus_cleanup)
1976 master->ops->bus_cleanup(master);
1977
1978 err_detach_devs:
1979 i3c_master_detach_free_devs(master);
1980
1981 return ret;
1982 }
1983
i3c_master_bus_cleanup(struct i3c_master_controller * master)1984 static void i3c_master_bus_cleanup(struct i3c_master_controller *master)
1985 {
1986 if (master->ops->bus_cleanup)
1987 master->ops->bus_cleanup(master);
1988
1989 i3c_master_detach_free_devs(master);
1990 }
1991
i3c_master_attach_boardinfo(struct i3c_dev_desc * i3cdev)1992 static void i3c_master_attach_boardinfo(struct i3c_dev_desc *i3cdev)
1993 {
1994 struct i3c_master_controller *master = i3cdev->common.master;
1995 struct i3c_dev_boardinfo *i3cboardinfo;
1996
1997 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) {
1998 if (i3cdev->info.pid != i3cboardinfo->pid)
1999 continue;
2000
2001 i3cdev->boardinfo = i3cboardinfo;
2002 i3cdev->info.static_addr = i3cboardinfo->static_addr;
2003 return;
2004 }
2005 }
2006
2007 static struct i3c_dev_desc *
i3c_master_search_i3c_dev_duplicate(struct i3c_dev_desc * refdev)2008 i3c_master_search_i3c_dev_duplicate(struct i3c_dev_desc *refdev)
2009 {
2010 struct i3c_master_controller *master = i3c_dev_get_master(refdev);
2011 struct i3c_dev_desc *i3cdev;
2012
2013 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
2014 if (i3cdev != refdev && i3cdev->info.pid == refdev->info.pid)
2015 return i3cdev;
2016 }
2017
2018 return NULL;
2019 }
2020
2021 /**
2022 * i3c_master_add_i3c_dev_locked() - add an I3C slave to the bus
2023 * @master: master used to send frames on the bus
2024 * @addr: I3C slave dynamic address assigned to the device
2025 *
2026 * This function is instantiating an I3C device object and adding it to the
2027 * I3C device list. All device information are automatically retrieved using
2028 * standard CCC commands.
2029 *
2030 * The I3C device object is returned in case the master wants to attach
2031 * private data to it using i3c_dev_set_master_data().
2032 *
2033 * This function must be called with the bus lock held in write mode.
2034 *
2035 * Return: a 0 in case of success, an negative error code otherwise.
2036 */
i3c_master_add_i3c_dev_locked(struct i3c_master_controller * master,u8 addr)2037 int i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master,
2038 u8 addr)
2039 {
2040 struct i3c_device_info info = { .dyn_addr = addr };
2041 struct i3c_dev_desc *newdev, *olddev;
2042 u8 old_dyn_addr = addr, expected_dyn_addr;
2043 struct i3c_ibi_setup ibireq = { };
2044 bool enable_ibi = false;
2045 int ret;
2046
2047 if (!master)
2048 return -EINVAL;
2049
2050 newdev = i3c_master_alloc_i3c_dev(master, &info);
2051 if (IS_ERR(newdev))
2052 return PTR_ERR(newdev);
2053
2054 ret = i3c_master_attach_i3c_dev(master, newdev);
2055 if (ret)
2056 goto err_free_dev;
2057
2058 ret = i3c_master_retrieve_dev_info(newdev);
2059 if (ret)
2060 goto err_detach_dev;
2061
2062 i3c_master_attach_boardinfo(newdev);
2063
2064 olddev = i3c_master_search_i3c_dev_duplicate(newdev);
2065 if (olddev) {
2066 newdev->dev = olddev->dev;
2067 if (newdev->dev)
2068 newdev->dev->desc = newdev;
2069
2070 /*
2071 * We need to restore the IBI state too, so let's save the
2072 * IBI information and try to restore them after olddev has
2073 * been detached+released and its IBI has been stopped and
2074 * the associated resources have been freed.
2075 */
2076 mutex_lock(&olddev->ibi_lock);
2077 if (olddev->ibi) {
2078 ibireq.handler = olddev->ibi->handler;
2079 ibireq.max_payload_len = olddev->ibi->max_payload_len;
2080 ibireq.num_slots = olddev->ibi->num_slots;
2081
2082 if (olddev->ibi->enabled)
2083 enable_ibi = true;
2084 /*
2085 * The olddev should not receive any commands on the
2086 * i3c bus as it does not exist and has been assigned
2087 * a new address. This will result in NACK or timeout.
2088 * So, update the olddev->ibi->enabled flag to false
2089 * to avoid DISEC with OldAddr.
2090 */
2091 olddev->ibi->enabled = false;
2092 i3c_dev_free_ibi_locked(olddev);
2093 }
2094 mutex_unlock(&olddev->ibi_lock);
2095
2096 old_dyn_addr = olddev->info.dyn_addr;
2097
2098 i3c_master_detach_i3c_dev(olddev);
2099 i3c_master_free_i3c_dev(olddev);
2100 }
2101
2102 /*
2103 * Depending on our previous state, the expected dynamic address might
2104 * differ:
2105 * - if the device already had a dynamic address assigned, let's try to
2106 * re-apply this one
2107 * - if the device did not have a dynamic address and the firmware
2108 * requested a specific address, pick this one
2109 * - in any other case, keep the address automatically assigned by the
2110 * master
2111 */
2112 if (old_dyn_addr && old_dyn_addr != newdev->info.dyn_addr)
2113 expected_dyn_addr = old_dyn_addr;
2114 else if (newdev->boardinfo && newdev->boardinfo->init_dyn_addr)
2115 expected_dyn_addr = newdev->boardinfo->init_dyn_addr;
2116 else
2117 expected_dyn_addr = newdev->info.dyn_addr;
2118
2119 if (newdev->info.dyn_addr != expected_dyn_addr &&
2120 i3c_bus_get_addr_slot_status(&master->bus, expected_dyn_addr) == I3C_ADDR_SLOT_FREE) {
2121 /*
2122 * Try to apply the expected dynamic address. If it fails, keep
2123 * the address assigned by the master.
2124 */
2125 ret = i3c_master_setnewda_locked(master,
2126 newdev->info.dyn_addr,
2127 expected_dyn_addr);
2128 if (!ret) {
2129 old_dyn_addr = newdev->info.dyn_addr;
2130 newdev->info.dyn_addr = expected_dyn_addr;
2131 i3c_master_reattach_i3c_dev(newdev, old_dyn_addr);
2132 } else {
2133 dev_err(&master->dev,
2134 "Failed to assign reserved/old address to device %d%llx",
2135 master->bus.id, newdev->info.pid);
2136 }
2137 }
2138
2139 /*
2140 * Now is time to try to restore the IBI setup. If we're lucky,
2141 * everything works as before, otherwise, all we can do is complain.
2142 * FIXME: maybe we should add callback to inform the driver that it
2143 * should request the IBI again instead of trying to hide that from
2144 * him.
2145 */
2146 if (ibireq.handler) {
2147 mutex_lock(&newdev->ibi_lock);
2148 ret = i3c_dev_request_ibi_locked(newdev, &ibireq);
2149 if (ret) {
2150 dev_err(&master->dev,
2151 "Failed to request IBI on device %d-%llx",
2152 master->bus.id, newdev->info.pid);
2153 } else if (enable_ibi) {
2154 ret = i3c_dev_enable_ibi_locked(newdev);
2155 if (ret)
2156 dev_err(&master->dev,
2157 "Failed to re-enable IBI on device %d-%llx",
2158 master->bus.id, newdev->info.pid);
2159 }
2160 mutex_unlock(&newdev->ibi_lock);
2161 }
2162
2163 return 0;
2164
2165 err_detach_dev:
2166 if (newdev->dev && newdev->dev->desc)
2167 newdev->dev->desc = NULL;
2168
2169 i3c_master_detach_i3c_dev(newdev);
2170
2171 err_free_dev:
2172 i3c_master_free_i3c_dev(newdev);
2173
2174 return ret;
2175 }
2176 EXPORT_SYMBOL_GPL(i3c_master_add_i3c_dev_locked);
2177
2178 #define OF_I3C_REG1_IS_I2C_DEV BIT(31)
2179
2180 static int
of_i3c_master_add_i2c_boardinfo(struct i3c_master_controller * master,struct device_node * node,u32 * reg)2181 of_i3c_master_add_i2c_boardinfo(struct i3c_master_controller *master,
2182 struct device_node *node, u32 *reg)
2183 {
2184 struct i2c_dev_boardinfo *boardinfo;
2185 struct device *dev = &master->dev;
2186 int ret;
2187
2188 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL);
2189 if (!boardinfo)
2190 return -ENOMEM;
2191
2192 ret = of_i2c_get_board_info(dev, node, &boardinfo->base);
2193 if (ret)
2194 return ret;
2195
2196 /*
2197 * The I3C Specification does not clearly say I2C devices with 10-bit
2198 * address are supported. These devices can't be passed properly through
2199 * DEFSLVS command.
2200 */
2201 if (boardinfo->base.flags & I2C_CLIENT_TEN) {
2202 dev_err(dev, "I2C device with 10 bit address not supported.");
2203 return -ENOTSUPP;
2204 }
2205
2206 /* LVR is encoded in reg[2]. */
2207 boardinfo->lvr = reg[2];
2208
2209 list_add_tail(&boardinfo->node, &master->boardinfo.i2c);
2210 of_node_get(node);
2211
2212 return 0;
2213 }
2214
2215 static int
of_i3c_master_add_i3c_boardinfo(struct i3c_master_controller * master,struct device_node * node,u32 * reg)2216 of_i3c_master_add_i3c_boardinfo(struct i3c_master_controller *master,
2217 struct device_node *node, u32 *reg)
2218 {
2219 struct i3c_dev_boardinfo *boardinfo;
2220 struct device *dev = &master->dev;
2221 enum i3c_addr_slot_status addrstatus;
2222 u32 init_dyn_addr = 0;
2223
2224 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL);
2225 if (!boardinfo)
2226 return -ENOMEM;
2227
2228 if (reg[0]) {
2229 if (reg[0] > I3C_MAX_ADDR)
2230 return -EINVAL;
2231
2232 addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
2233 reg[0]);
2234 if (addrstatus != I3C_ADDR_SLOT_FREE)
2235 return -EINVAL;
2236 }
2237
2238 boardinfo->static_addr = reg[0];
2239
2240 if (!of_property_read_u32(node, "assigned-address", &init_dyn_addr)) {
2241 if (init_dyn_addr > I3C_MAX_ADDR)
2242 return -EINVAL;
2243
2244 addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
2245 init_dyn_addr);
2246 if (addrstatus != I3C_ADDR_SLOT_FREE)
2247 return -EINVAL;
2248 }
2249
2250 boardinfo->pid = ((u64)reg[1] << 32) | reg[2];
2251
2252 if ((boardinfo->pid & GENMASK_ULL(63, 48)) ||
2253 I3C_PID_RND_LOWER_32BITS(boardinfo->pid))
2254 return -EINVAL;
2255
2256 boardinfo->init_dyn_addr = init_dyn_addr;
2257 boardinfo->of_node = of_node_get(node);
2258 list_add_tail(&boardinfo->node, &master->boardinfo.i3c);
2259
2260 return 0;
2261 }
2262
of_i3c_master_add_dev(struct i3c_master_controller * master,struct device_node * node)2263 static int of_i3c_master_add_dev(struct i3c_master_controller *master,
2264 struct device_node *node)
2265 {
2266 u32 reg[3];
2267 int ret;
2268
2269 if (!master || !node)
2270 return -EINVAL;
2271
2272 ret = of_property_read_u32_array(node, "reg", reg, ARRAY_SIZE(reg));
2273 if (ret)
2274 return ret;
2275
2276 /*
2277 * The manufacturer ID can't be 0. If reg[1] == 0 that means we're
2278 * dealing with an I2C device.
2279 */
2280 if (!reg[1])
2281 ret = of_i3c_master_add_i2c_boardinfo(master, node, reg);
2282 else
2283 ret = of_i3c_master_add_i3c_boardinfo(master, node, reg);
2284
2285 return ret;
2286 }
2287
of_populate_i3c_bus(struct i3c_master_controller * master)2288 static int of_populate_i3c_bus(struct i3c_master_controller *master)
2289 {
2290 struct device *dev = &master->dev;
2291 struct device_node *i3cbus_np = dev->of_node;
2292 struct device_node *node;
2293 int ret;
2294 u32 val;
2295
2296 if (!i3cbus_np)
2297 return 0;
2298
2299 for_each_available_child_of_node(i3cbus_np, node) {
2300 ret = of_i3c_master_add_dev(master, node);
2301 if (ret) {
2302 of_node_put(node);
2303 return ret;
2304 }
2305 }
2306
2307 /*
2308 * The user might want to limit I2C and I3C speed in case some devices
2309 * on the bus are not supporting typical rates, or if the bus topology
2310 * prevents it from using max possible rate.
2311 */
2312 if (!of_property_read_u32(i3cbus_np, "i2c-scl-hz", &val))
2313 master->bus.scl_rate.i2c = val;
2314
2315 if (!of_property_read_u32(i3cbus_np, "i3c-scl-hz", &val))
2316 master->bus.scl_rate.i3c = val;
2317
2318 return 0;
2319 }
2320
i3c_master_i2c_adapter_xfer(struct i2c_adapter * adap,struct i2c_msg * xfers,int nxfers)2321 static int i3c_master_i2c_adapter_xfer(struct i2c_adapter *adap,
2322 struct i2c_msg *xfers, int nxfers)
2323 {
2324 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2325 struct i2c_dev_desc *dev;
2326 int i, ret;
2327 u16 addr;
2328
2329 if (!xfers || !master || nxfers <= 0)
2330 return -EINVAL;
2331
2332 if (!master->ops->i2c_xfers)
2333 return -ENOTSUPP;
2334
2335 /* Doing transfers to different devices is not supported. */
2336 addr = xfers[0].addr;
2337 for (i = 1; i < nxfers; i++) {
2338 if (addr != xfers[i].addr)
2339 return -ENOTSUPP;
2340 }
2341
2342 i3c_bus_normaluse_lock(&master->bus);
2343 dev = i3c_master_find_i2c_dev_by_addr(master, addr);
2344 if (!dev)
2345 ret = -ENOENT;
2346 else
2347 ret = master->ops->i2c_xfers(dev, xfers, nxfers);
2348 i3c_bus_normaluse_unlock(&master->bus);
2349
2350 return ret ? ret : nxfers;
2351 }
2352
i3c_master_i2c_funcs(struct i2c_adapter * adapter)2353 static u32 i3c_master_i2c_funcs(struct i2c_adapter *adapter)
2354 {
2355 return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C;
2356 }
2357
i3c_master_i2c_get_lvr(struct i2c_client * client)2358 static u8 i3c_master_i2c_get_lvr(struct i2c_client *client)
2359 {
2360 /* Fall back to no spike filters and FM bus mode. */
2361 u8 lvr = I3C_LVR_I2C_INDEX(2) | I3C_LVR_I2C_FM_MODE;
2362
2363 if (client->dev.of_node) {
2364 u32 reg[3];
2365
2366 if (!of_property_read_u32_array(client->dev.of_node, "reg",
2367 reg, ARRAY_SIZE(reg)))
2368 lvr = reg[2];
2369 }
2370
2371 return lvr;
2372 }
2373
i3c_master_i2c_attach(struct i2c_adapter * adap,struct i2c_client * client)2374 static int i3c_master_i2c_attach(struct i2c_adapter *adap, struct i2c_client *client)
2375 {
2376 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2377 enum i3c_addr_slot_status status;
2378 struct i2c_dev_desc *i2cdev;
2379 int ret;
2380
2381 /* Already added by board info? */
2382 if (i3c_master_find_i2c_dev_by_addr(master, client->addr))
2383 return 0;
2384
2385 status = i3c_bus_get_addr_slot_status(&master->bus, client->addr);
2386 if (status != I3C_ADDR_SLOT_FREE)
2387 return -EBUSY;
2388
2389 i3c_bus_set_addr_slot_status(&master->bus, client->addr,
2390 I3C_ADDR_SLOT_I2C_DEV);
2391
2392 i2cdev = i3c_master_alloc_i2c_dev(master, client->addr,
2393 i3c_master_i2c_get_lvr(client));
2394 if (IS_ERR(i2cdev)) {
2395 ret = PTR_ERR(i2cdev);
2396 goto out_clear_status;
2397 }
2398
2399 ret = i3c_master_attach_i2c_dev(master, i2cdev);
2400 if (ret)
2401 goto out_free_dev;
2402
2403 return 0;
2404
2405 out_free_dev:
2406 i3c_master_free_i2c_dev(i2cdev);
2407 out_clear_status:
2408 i3c_bus_set_addr_slot_status(&master->bus, client->addr,
2409 I3C_ADDR_SLOT_FREE);
2410
2411 return ret;
2412 }
2413
i3c_master_i2c_detach(struct i2c_adapter * adap,struct i2c_client * client)2414 static int i3c_master_i2c_detach(struct i2c_adapter *adap, struct i2c_client *client)
2415 {
2416 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2417 struct i2c_dev_desc *dev;
2418
2419 dev = i3c_master_find_i2c_dev_by_addr(master, client->addr);
2420 if (!dev)
2421 return -ENODEV;
2422
2423 i3c_master_detach_i2c_dev(dev);
2424 i3c_bus_set_addr_slot_status(&master->bus, dev->addr,
2425 I3C_ADDR_SLOT_FREE);
2426 i3c_master_free_i2c_dev(dev);
2427
2428 return 0;
2429 }
2430
2431 static const struct i2c_algorithm i3c_master_i2c_algo = {
2432 .master_xfer = i3c_master_i2c_adapter_xfer,
2433 .functionality = i3c_master_i2c_funcs,
2434 };
2435
i3c_i2c_notifier_call(struct notifier_block * nb,unsigned long action,void * data)2436 static int i3c_i2c_notifier_call(struct notifier_block *nb, unsigned long action,
2437 void *data)
2438 {
2439 struct i2c_adapter *adap;
2440 struct i2c_client *client;
2441 struct device *dev = data;
2442 struct i3c_master_controller *master;
2443 int ret;
2444
2445 if (dev->type != &i2c_client_type)
2446 return 0;
2447
2448 client = to_i2c_client(dev);
2449 adap = client->adapter;
2450
2451 if (adap->algo != &i3c_master_i2c_algo)
2452 return 0;
2453
2454 master = i2c_adapter_to_i3c_master(adap);
2455
2456 i3c_bus_maintenance_lock(&master->bus);
2457 switch (action) {
2458 case BUS_NOTIFY_ADD_DEVICE:
2459 ret = i3c_master_i2c_attach(adap, client);
2460 break;
2461 case BUS_NOTIFY_DEL_DEVICE:
2462 ret = i3c_master_i2c_detach(adap, client);
2463 break;
2464 }
2465 i3c_bus_maintenance_unlock(&master->bus);
2466
2467 return ret;
2468 }
2469
2470 static struct notifier_block i2cdev_notifier = {
2471 .notifier_call = i3c_i2c_notifier_call,
2472 };
2473
i3c_master_i2c_adapter_init(struct i3c_master_controller * master)2474 static int i3c_master_i2c_adapter_init(struct i3c_master_controller *master)
2475 {
2476 struct i2c_adapter *adap = i3c_master_to_i2c_adapter(master);
2477 struct i2c_dev_desc *i2cdev;
2478 struct i2c_dev_boardinfo *i2cboardinfo;
2479 int ret;
2480
2481 adap->dev.parent = master->dev.parent;
2482 adap->owner = master->dev.parent->driver->owner;
2483 adap->algo = &i3c_master_i2c_algo;
2484 strncpy(adap->name, dev_name(master->dev.parent), sizeof(adap->name));
2485
2486 /* FIXME: Should we allow i3c masters to override these values? */
2487 adap->timeout = 1000;
2488 adap->retries = 3;
2489
2490 ret = i2c_add_adapter(adap);
2491 if (ret)
2492 return ret;
2493
2494 /*
2495 * We silently ignore failures here. The bus should keep working
2496 * correctly even if one or more i2c devices are not registered.
2497 */
2498 list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) {
2499 i2cdev = i3c_master_find_i2c_dev_by_addr(master,
2500 i2cboardinfo->base.addr);
2501 if (WARN_ON(!i2cdev))
2502 continue;
2503 i2cdev->dev = i2c_new_client_device(adap, &i2cboardinfo->base);
2504 }
2505
2506 return 0;
2507 }
2508
i3c_master_i2c_adapter_cleanup(struct i3c_master_controller * master)2509 static void i3c_master_i2c_adapter_cleanup(struct i3c_master_controller *master)
2510 {
2511 struct i2c_dev_desc *i2cdev;
2512
2513 i2c_del_adapter(&master->i2c);
2514
2515 i3c_bus_for_each_i2cdev(&master->bus, i2cdev)
2516 i2cdev->dev = NULL;
2517 }
2518
i3c_master_unregister_i3c_devs(struct i3c_master_controller * master)2519 static void i3c_master_unregister_i3c_devs(struct i3c_master_controller *master)
2520 {
2521 struct i3c_dev_desc *i3cdev;
2522
2523 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
2524 if (!i3cdev->dev)
2525 continue;
2526
2527 i3cdev->dev->desc = NULL;
2528 if (device_is_registered(&i3cdev->dev->dev))
2529 device_unregister(&i3cdev->dev->dev);
2530 else
2531 put_device(&i3cdev->dev->dev);
2532 i3cdev->dev = NULL;
2533 }
2534 }
2535
2536 /**
2537 * i3c_master_queue_ibi() - Queue an IBI
2538 * @dev: the device this IBI is coming from
2539 * @slot: the IBI slot used to store the payload
2540 *
2541 * Queue an IBI to the controller workqueue. The IBI handler attached to
2542 * the dev will be called from a workqueue context.
2543 */
i3c_master_queue_ibi(struct i3c_dev_desc * dev,struct i3c_ibi_slot * slot)2544 void i3c_master_queue_ibi(struct i3c_dev_desc *dev, struct i3c_ibi_slot *slot)
2545 {
2546 atomic_inc(&dev->ibi->pending_ibis);
2547 queue_work(dev->common.master->wq, &slot->work);
2548 }
2549 EXPORT_SYMBOL_GPL(i3c_master_queue_ibi);
2550
i3c_master_handle_ibi(struct work_struct * work)2551 static void i3c_master_handle_ibi(struct work_struct *work)
2552 {
2553 struct i3c_ibi_slot *slot = container_of(work, struct i3c_ibi_slot,
2554 work);
2555 struct i3c_dev_desc *dev = slot->dev;
2556 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2557 struct i3c_ibi_payload payload;
2558
2559 payload.data = slot->data;
2560 payload.len = slot->len;
2561
2562 if (dev->dev)
2563 dev->ibi->handler(dev->dev, &payload);
2564
2565 master->ops->recycle_ibi_slot(dev, slot);
2566 if (atomic_dec_and_test(&dev->ibi->pending_ibis))
2567 complete(&dev->ibi->all_ibis_handled);
2568 }
2569
i3c_master_init_ibi_slot(struct i3c_dev_desc * dev,struct i3c_ibi_slot * slot)2570 static void i3c_master_init_ibi_slot(struct i3c_dev_desc *dev,
2571 struct i3c_ibi_slot *slot)
2572 {
2573 slot->dev = dev;
2574 INIT_WORK(&slot->work, i3c_master_handle_ibi);
2575 }
2576
2577 struct i3c_generic_ibi_slot {
2578 struct list_head node;
2579 struct i3c_ibi_slot base;
2580 };
2581
2582 struct i3c_generic_ibi_pool {
2583 spinlock_t lock;
2584 unsigned int num_slots;
2585 struct i3c_generic_ibi_slot *slots;
2586 void *payload_buf;
2587 struct list_head free_slots;
2588 struct list_head pending;
2589 };
2590
2591 /**
2592 * i3c_generic_ibi_free_pool() - Free a generic IBI pool
2593 * @pool: the IBI pool to free
2594 *
2595 * Free all IBI slots allated by a generic IBI pool.
2596 */
i3c_generic_ibi_free_pool(struct i3c_generic_ibi_pool * pool)2597 void i3c_generic_ibi_free_pool(struct i3c_generic_ibi_pool *pool)
2598 {
2599 struct i3c_generic_ibi_slot *slot;
2600 unsigned int nslots = 0;
2601
2602 while (!list_empty(&pool->free_slots)) {
2603 slot = list_first_entry(&pool->free_slots,
2604 struct i3c_generic_ibi_slot, node);
2605 list_del(&slot->node);
2606 nslots++;
2607 }
2608
2609 /*
2610 * If the number of freed slots is not equal to the number of allocated
2611 * slots we have a leak somewhere.
2612 */
2613 WARN_ON(nslots != pool->num_slots);
2614
2615 kfree(pool->payload_buf);
2616 kfree(pool->slots);
2617 kfree(pool);
2618 }
2619 EXPORT_SYMBOL_GPL(i3c_generic_ibi_free_pool);
2620
2621 /**
2622 * i3c_generic_ibi_alloc_pool() - Create a generic IBI pool
2623 * @dev: the device this pool will be used for
2624 * @req: IBI setup request describing what the device driver expects
2625 *
2626 * Create a generic IBI pool based on the information provided in @req.
2627 *
2628 * Return: a valid IBI pool in case of success, an ERR_PTR() otherwise.
2629 */
2630 struct i3c_generic_ibi_pool *
i3c_generic_ibi_alloc_pool(struct i3c_dev_desc * dev,const struct i3c_ibi_setup * req)2631 i3c_generic_ibi_alloc_pool(struct i3c_dev_desc *dev,
2632 const struct i3c_ibi_setup *req)
2633 {
2634 struct i3c_generic_ibi_pool *pool;
2635 struct i3c_generic_ibi_slot *slot;
2636 unsigned int i;
2637 int ret;
2638
2639 pool = kzalloc(sizeof(*pool), GFP_KERNEL);
2640 if (!pool)
2641 return ERR_PTR(-ENOMEM);
2642
2643 spin_lock_init(&pool->lock);
2644 INIT_LIST_HEAD(&pool->free_slots);
2645 INIT_LIST_HEAD(&pool->pending);
2646
2647 pool->slots = kcalloc(req->num_slots, sizeof(*slot), GFP_KERNEL);
2648 if (!pool->slots) {
2649 ret = -ENOMEM;
2650 goto err_free_pool;
2651 }
2652
2653 if (req->max_payload_len) {
2654 pool->payload_buf = kcalloc(req->num_slots,
2655 req->max_payload_len, GFP_KERNEL);
2656 if (!pool->payload_buf) {
2657 ret = -ENOMEM;
2658 goto err_free_pool;
2659 }
2660 }
2661
2662 for (i = 0; i < req->num_slots; i++) {
2663 slot = &pool->slots[i];
2664 i3c_master_init_ibi_slot(dev, &slot->base);
2665
2666 if (req->max_payload_len)
2667 slot->base.data = pool->payload_buf +
2668 (i * req->max_payload_len);
2669
2670 list_add_tail(&slot->node, &pool->free_slots);
2671 pool->num_slots++;
2672 }
2673
2674 return pool;
2675
2676 err_free_pool:
2677 i3c_generic_ibi_free_pool(pool);
2678 return ERR_PTR(ret);
2679 }
2680 EXPORT_SYMBOL_GPL(i3c_generic_ibi_alloc_pool);
2681
2682 /**
2683 * i3c_generic_ibi_get_free_slot() - Get a free slot from a generic IBI pool
2684 * @pool: the pool to query an IBI slot on
2685 *
2686 * Search for a free slot in a generic IBI pool.
2687 * The slot should be returned to the pool using i3c_generic_ibi_recycle_slot()
2688 * when it's no longer needed.
2689 *
2690 * Return: a pointer to a free slot, or NULL if there's no free slot available.
2691 */
2692 struct i3c_ibi_slot *
i3c_generic_ibi_get_free_slot(struct i3c_generic_ibi_pool * pool)2693 i3c_generic_ibi_get_free_slot(struct i3c_generic_ibi_pool *pool)
2694 {
2695 struct i3c_generic_ibi_slot *slot;
2696 unsigned long flags;
2697
2698 spin_lock_irqsave(&pool->lock, flags);
2699 slot = list_first_entry_or_null(&pool->free_slots,
2700 struct i3c_generic_ibi_slot, node);
2701 if (slot)
2702 list_del(&slot->node);
2703 spin_unlock_irqrestore(&pool->lock, flags);
2704
2705 return slot ? &slot->base : NULL;
2706 }
2707 EXPORT_SYMBOL_GPL(i3c_generic_ibi_get_free_slot);
2708
2709 /**
2710 * i3c_generic_ibi_recycle_slot() - Return a slot to a generic IBI pool
2711 * @pool: the pool to return the IBI slot to
2712 * @s: IBI slot to recycle
2713 *
2714 * Add an IBI slot back to its generic IBI pool. Should be called from the
2715 * master driver struct_master_controller_ops->recycle_ibi() method.
2716 */
i3c_generic_ibi_recycle_slot(struct i3c_generic_ibi_pool * pool,struct i3c_ibi_slot * s)2717 void i3c_generic_ibi_recycle_slot(struct i3c_generic_ibi_pool *pool,
2718 struct i3c_ibi_slot *s)
2719 {
2720 struct i3c_generic_ibi_slot *slot;
2721 unsigned long flags;
2722
2723 if (!s)
2724 return;
2725
2726 slot = container_of(s, struct i3c_generic_ibi_slot, base);
2727 spin_lock_irqsave(&pool->lock, flags);
2728 list_add_tail(&slot->node, &pool->free_slots);
2729 spin_unlock_irqrestore(&pool->lock, flags);
2730 }
2731 EXPORT_SYMBOL_GPL(i3c_generic_ibi_recycle_slot);
2732
i3c_master_check_ops(const struct i3c_master_controller_ops * ops)2733 static int i3c_master_check_ops(const struct i3c_master_controller_ops *ops)
2734 {
2735 if (!ops || !ops->bus_init || !ops->priv_xfers ||
2736 !ops->send_ccc_cmd || !ops->do_daa || !ops->i2c_xfers)
2737 return -EINVAL;
2738
2739 if (ops->request_ibi &&
2740 (!ops->enable_ibi || !ops->disable_ibi || !ops->free_ibi ||
2741 !ops->recycle_ibi_slot))
2742 return -EINVAL;
2743
2744 return 0;
2745 }
2746
2747 /**
2748 * i3c_master_register() - register an I3C master
2749 * @master: master used to send frames on the bus
2750 * @parent: the parent device (the one that provides this I3C master
2751 * controller)
2752 * @ops: the master controller operations
2753 * @secondary: true if you are registering a secondary master. Will return
2754 * -ENOTSUPP if set to true since secondary masters are not yet
2755 * supported
2756 *
2757 * This function takes care of everything for you:
2758 *
2759 * - creates and initializes the I3C bus
2760 * - populates the bus with static I2C devs if @parent->of_node is not
2761 * NULL
2762 * - registers all I3C devices added by the controller during bus
2763 * initialization
2764 * - registers the I2C adapter and all I2C devices
2765 *
2766 * Return: 0 in case of success, a negative error code otherwise.
2767 */
i3c_master_register(struct i3c_master_controller * master,struct device * parent,const struct i3c_master_controller_ops * ops,bool secondary)2768 int i3c_master_register(struct i3c_master_controller *master,
2769 struct device *parent,
2770 const struct i3c_master_controller_ops *ops,
2771 bool secondary)
2772 {
2773 unsigned long i2c_scl_rate = I3C_BUS_I2C_FM_PLUS_SCL_RATE;
2774 struct i3c_bus *i3cbus = i3c_master_get_bus(master);
2775 enum i3c_bus_mode mode = I3C_BUS_MODE_PURE;
2776 struct i2c_dev_boardinfo *i2cbi;
2777 int ret;
2778
2779 /* We do not support secondary masters yet. */
2780 if (secondary)
2781 return -ENOTSUPP;
2782
2783 ret = i3c_master_check_ops(ops);
2784 if (ret)
2785 return ret;
2786
2787 master->dev.parent = parent;
2788 master->dev.of_node = of_node_get(parent->of_node);
2789 master->dev.bus = &i3c_bus_type;
2790 master->dev.type = &i3c_masterdev_type;
2791 master->dev.release = i3c_masterdev_release;
2792 master->ops = ops;
2793 master->secondary = secondary;
2794 INIT_LIST_HEAD(&master->boardinfo.i2c);
2795 INIT_LIST_HEAD(&master->boardinfo.i3c);
2796
2797 ret = i3c_bus_init(i3cbus, master->dev.of_node);
2798 if (ret)
2799 return ret;
2800
2801 device_initialize(&master->dev);
2802 dev_set_name(&master->dev, "i3c-%d", i3cbus->id);
2803
2804 ret = of_populate_i3c_bus(master);
2805 if (ret)
2806 goto err_put_dev;
2807
2808 list_for_each_entry(i2cbi, &master->boardinfo.i2c, node) {
2809 switch (i2cbi->lvr & I3C_LVR_I2C_INDEX_MASK) {
2810 case I3C_LVR_I2C_INDEX(0):
2811 if (mode < I3C_BUS_MODE_MIXED_FAST)
2812 mode = I3C_BUS_MODE_MIXED_FAST;
2813 break;
2814 case I3C_LVR_I2C_INDEX(1):
2815 if (mode < I3C_BUS_MODE_MIXED_LIMITED)
2816 mode = I3C_BUS_MODE_MIXED_LIMITED;
2817 break;
2818 case I3C_LVR_I2C_INDEX(2):
2819 if (mode < I3C_BUS_MODE_MIXED_SLOW)
2820 mode = I3C_BUS_MODE_MIXED_SLOW;
2821 break;
2822 default:
2823 ret = -EINVAL;
2824 goto err_put_dev;
2825 }
2826
2827 if (i2cbi->lvr & I3C_LVR_I2C_FM_MODE)
2828 i2c_scl_rate = I3C_BUS_I2C_FM_SCL_RATE;
2829 }
2830
2831 ret = i3c_bus_set_mode(i3cbus, mode, i2c_scl_rate);
2832 if (ret)
2833 goto err_put_dev;
2834
2835 master->wq = alloc_workqueue("%s", 0, 0, dev_name(parent));
2836 if (!master->wq) {
2837 ret = -ENOMEM;
2838 goto err_put_dev;
2839 }
2840
2841 ret = i3c_master_bus_init(master);
2842 if (ret)
2843 goto err_put_dev;
2844
2845 ret = device_add(&master->dev);
2846 if (ret)
2847 goto err_cleanup_bus;
2848
2849 /*
2850 * Expose our I3C bus as an I2C adapter so that I2C devices are exposed
2851 * through the I2C subsystem.
2852 */
2853 ret = i3c_master_i2c_adapter_init(master);
2854 if (ret)
2855 goto err_del_dev;
2856
2857 i3c_bus_notify(i3cbus, I3C_NOTIFY_BUS_ADD);
2858
2859 /*
2860 * We're done initializing the bus and the controller, we can now
2861 * register I3C devices discovered during the initial DAA.
2862 */
2863 master->init_done = true;
2864 i3c_bus_normaluse_lock(&master->bus);
2865 i3c_master_register_new_i3c_devs(master);
2866 i3c_bus_normaluse_unlock(&master->bus);
2867
2868 return 0;
2869
2870 err_del_dev:
2871 device_del(&master->dev);
2872
2873 err_cleanup_bus:
2874 i3c_master_bus_cleanup(master);
2875
2876 err_put_dev:
2877 put_device(&master->dev);
2878
2879 return ret;
2880 }
2881 EXPORT_SYMBOL_GPL(i3c_master_register);
2882
2883 /**
2884 * i3c_master_unregister() - unregister an I3C master
2885 * @master: master used to send frames on the bus
2886 *
2887 * Basically undo everything done in i3c_master_register().
2888 */
i3c_master_unregister(struct i3c_master_controller * master)2889 void i3c_master_unregister(struct i3c_master_controller *master)
2890 {
2891 i3c_bus_notify(&master->bus, I3C_NOTIFY_BUS_REMOVE);
2892
2893 i3c_master_i2c_adapter_cleanup(master);
2894 i3c_master_unregister_i3c_devs(master);
2895 i3c_master_bus_cleanup(master);
2896 device_unregister(&master->dev);
2897 }
2898 EXPORT_SYMBOL_GPL(i3c_master_unregister);
2899
i3c_dev_setdasa_locked(struct i3c_dev_desc * dev)2900 int i3c_dev_setdasa_locked(struct i3c_dev_desc *dev)
2901 {
2902 struct i3c_master_controller *master;
2903
2904 if (!dev)
2905 return -ENOENT;
2906
2907 master = i3c_dev_get_master(dev);
2908 if (!master)
2909 return -EINVAL;
2910
2911 if (!dev->boardinfo || !dev->boardinfo->init_dyn_addr ||
2912 !dev->boardinfo->static_addr)
2913 return -EINVAL;
2914
2915 return i3c_master_setdasa_locked(master, dev->info.static_addr,
2916 dev->boardinfo->init_dyn_addr);
2917 }
2918
i3c_dev_do_priv_xfers_locked(struct i3c_dev_desc * dev,struct i3c_priv_xfer * xfers,int nxfers)2919 int i3c_dev_do_priv_xfers_locked(struct i3c_dev_desc *dev,
2920 struct i3c_priv_xfer *xfers,
2921 int nxfers)
2922 {
2923 struct i3c_master_controller *master;
2924
2925 if (!dev)
2926 return -ENOENT;
2927
2928 master = i3c_dev_get_master(dev);
2929 if (!master || !xfers)
2930 return -EINVAL;
2931
2932 if (!master->ops->priv_xfers)
2933 return -ENOTSUPP;
2934
2935 return master->ops->priv_xfers(dev, xfers, nxfers);
2936 }
2937
i3c_dev_disable_ibi_locked(struct i3c_dev_desc * dev)2938 int i3c_dev_disable_ibi_locked(struct i3c_dev_desc *dev)
2939 {
2940 struct i3c_master_controller *master;
2941 int ret;
2942
2943 if (!dev->ibi)
2944 return -EINVAL;
2945
2946 master = i3c_dev_get_master(dev);
2947 ret = master->ops->disable_ibi(dev);
2948 if (ret)
2949 return ret;
2950
2951 reinit_completion(&dev->ibi->all_ibis_handled);
2952 if (atomic_read(&dev->ibi->pending_ibis))
2953 wait_for_completion(&dev->ibi->all_ibis_handled);
2954
2955 dev->ibi->enabled = false;
2956
2957 return 0;
2958 }
2959
i3c_dev_enable_ibi_locked(struct i3c_dev_desc * dev)2960 int i3c_dev_enable_ibi_locked(struct i3c_dev_desc *dev)
2961 {
2962 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2963 int ret;
2964
2965 if (!dev->ibi)
2966 return -EINVAL;
2967
2968 ret = master->ops->enable_ibi(dev);
2969 if (!ret)
2970 dev->ibi->enabled = true;
2971
2972 return ret;
2973 }
2974
i3c_dev_request_ibi_locked(struct i3c_dev_desc * dev,const struct i3c_ibi_setup * req)2975 int i3c_dev_request_ibi_locked(struct i3c_dev_desc *dev,
2976 const struct i3c_ibi_setup *req)
2977 {
2978 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2979 struct i3c_device_ibi_info *ibi;
2980 int ret;
2981
2982 if (!master->ops->request_ibi)
2983 return -ENOTSUPP;
2984
2985 if (dev->ibi)
2986 return -EBUSY;
2987
2988 ibi = kzalloc(sizeof(*ibi), GFP_KERNEL);
2989 if (!ibi)
2990 return -ENOMEM;
2991
2992 atomic_set(&ibi->pending_ibis, 0);
2993 init_completion(&ibi->all_ibis_handled);
2994 ibi->handler = req->handler;
2995 ibi->max_payload_len = req->max_payload_len;
2996 ibi->num_slots = req->num_slots;
2997
2998 dev->ibi = ibi;
2999 ret = master->ops->request_ibi(dev, req);
3000 if (ret) {
3001 kfree(ibi);
3002 dev->ibi = NULL;
3003 }
3004
3005 return ret;
3006 }
3007
i3c_dev_free_ibi_locked(struct i3c_dev_desc * dev)3008 void i3c_dev_free_ibi_locked(struct i3c_dev_desc *dev)
3009 {
3010 struct i3c_master_controller *master = i3c_dev_get_master(dev);
3011
3012 if (!dev->ibi)
3013 return;
3014
3015 if (WARN_ON(dev->ibi->enabled))
3016 WARN_ON(i3c_dev_disable_ibi_locked(dev));
3017
3018 master->ops->free_ibi(dev);
3019 kfree(dev->ibi);
3020 dev->ibi = NULL;
3021 }
3022
i3c_init(void)3023 static int __init i3c_init(void)
3024 {
3025 int res;
3026
3027 res = of_alias_get_highest_id("i3c");
3028 if (res >= 0) {
3029 mutex_lock(&i3c_core_lock);
3030 __i3c_first_dynamic_bus_num = res + 1;
3031 mutex_unlock(&i3c_core_lock);
3032 }
3033
3034 res = bus_register_notifier(&i2c_bus_type, &i2cdev_notifier);
3035 if (res)
3036 return res;
3037
3038 res = bus_register(&i3c_bus_type);
3039 if (res)
3040 goto out_unreg_notifier;
3041
3042 return 0;
3043
3044 out_unreg_notifier:
3045 bus_unregister_notifier(&i2c_bus_type, &i2cdev_notifier);
3046
3047 return res;
3048 }
3049 subsys_initcall(i3c_init);
3050
i3c_exit(void)3051 static void __exit i3c_exit(void)
3052 {
3053 bus_unregister_notifier(&i2c_bus_type, &i2cdev_notifier);
3054 idr_destroy(&i3c_bus_idr);
3055 bus_unregister(&i3c_bus_type);
3056 }
3057 module_exit(i3c_exit);
3058
3059 MODULE_AUTHOR("Boris Brezillon <boris.brezillon@bootlin.com>");
3060 MODULE_DESCRIPTION("I3C core");
3061 MODULE_LICENSE("GPL v2");
3062