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Searched defs:ddr_pll_ctrl (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/mach-omap2/am33xx/
H A Dclock_ti816x.c240 u32 ddr_pll_ctrl = 0; in ddr_pll_bypass_ti816x() local
251 u32 ddr_pll_ctrl = 0; in ddr_pll_init_ti816x() local
/openbmc/u-boot/arch/arm/mach-zynq/include/mach/
H A Dhardware.h36 u32 ddr_pll_ctrl; /* 0x104 */ member