Home
last modified time | relevance | path

Searched defs:ccsr (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/clk/pxa/
H A Dclk-pxa27x.c105 unsigned long ccsr = readl(clk_regs + CCSR); in pxa27x_is_ppll_disabled() local
207 unsigned long ccsr = readl(clk_regs + CCSR); in clk_pxa27x_cpll_get_rate() local
252 unsigned long ccsr = readl(clk_regs + CCSR); in clk_pxa27x_lcd_base_get_rate() local
274 unsigned long ccsr = readl(clk_regs + CCSR); in clk_pxa27x_lcd_base_get_parent() local
303 unsigned long ccsr = readl(clk_regs + CCSR); in clk_pxa27x_core_get_parent() local
340 unsigned long ccsr = readl(clk_regs + CCSR); in clk_pxa27x_run_get_rate() local
363 unsigned long ccsr = readl(clk_regs + CCSR); in clk_pxa27x_system_bus_get_rate() local
380 unsigned long ccsr = readl(clk_regs + CCSR); in clk_pxa27x_system_bus_get_parent() local
397 unsigned long ccsr = readl(clk_regs + CCSR); in clk_pxa27x_memory_get_rate() local
416 unsigned long ccsr = readl(clk_regs + CCSR); in clk_pxa27x_memory_get_parent() local
/openbmc/linux/arch/powerpc/sysdev/
H A Dfsl_rio.c396 static inline void fsl_rio_info(struct device *dev, u32 ccsr) in fsl_rio_info()
455 u32 ccsr; in fsl_rio_setup() local
/openbmc/linux/drivers/net/wireless/intersil/orinoco/
H A Dspectrum_cs.c81 u8 ccsr; in spectrum_reset() local
/openbmc/qemu/hw/ppc/
H A De500.c864 MemoryRegion *ccsr, in ppce500_init_mpic()
935 PPCE500CCSRState *ccsr; in ppce500_init() local
1284 PPCE500CCSRState *ccsr = CCSR(obj); in e500_ccsr_initfn() local
/openbmc/u-boot/arch/arm/mach-imx/mx5/
H A Dclock.c235 u32 ccsr = readl(&mxc_ccm->ccsr); in get_lp_apm() local
647 u32 ccsr = readl(&mxc_ccm->ccsr); in config_pll_clk() local
/openbmc/qemu/hw/pci-host/
H A Dppce500.c422 PPCE500CCSRState *ccsr = CCSR(container_get(qdev_get_machine(), in e500_pcihost_bridge_realize() local
/openbmc/u-boot/arch/arm/include/asm/arch-armada100/
H A Dcpu.h45 u32 ccsr; /* 0x00C */ member
/openbmc/u-boot/arch/arm/include/asm/arch-vf610/
H A Dcrm_regs.h17 u32 ccsr; member
/openbmc/u-boot/arch/arm/include/asm/arch-mx27/
H A Dimx-regs.h125 u32 ccsr; /* Clock Control Status Register */ member
/openbmc/u-boot/arch/arm/include/asm/arch-mx5/
H A Dimx-regs.h304 u32 ccsr; member
H A Dcrm_regs.h32 u32 ccsr; member
/openbmc/u-boot/arch/arm/include/asm/arch-mx6/
H A Dcrm_regs.h25 u32 ccsr; member