1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2/*
3 * Device Tree Source for the R-Car V4H (R8A779G0) SoC
4 *
5 * Copyright (C) 2022 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/r8a779g0-cpg-mssr.h>
9#include <dt-bindings/interrupt-controller/arm-gic.h>
10#include <dt-bindings/power/r8a779g0-sysc.h>
11
12/ {
13	compatible = "renesas,r8a779g0";
14	#address-cells = <2>;
15	#size-cells = <2>;
16
17	/* External Audio clock - to be overridden by boards that provide it */
18	audio_clkin: audio_clkin {
19		compatible = "fixed-clock";
20		#clock-cells = <0>;
21		clock-frequency = <0>;
22	};
23
24	/* External CAN clock - to be overridden by boards that provide it */
25	can_clk: can {
26		compatible = "fixed-clock";
27		#clock-cells = <0>;
28		clock-frequency = <0>;
29	};
30
31	cluster0_opp: opp-table-0 {
32		compatible = "operating-points-v2";
33		opp-shared;
34
35		opp-500000000 {
36			opp-hz = /bits/ 64 <500000000>;
37			opp-microvolt = <825000>;
38			clock-latency-ns = <500000>;
39		};
40		opp-1000000000 {
41			opp-hz = /bits/ 64 <1000000000>;
42			opp-microvolt = <825000>;
43			clock-latency-ns = <500000>;
44		};
45		opp-1500000000 {
46			opp-hz = /bits/ 64 <1500000000>;
47			opp-microvolt = <825000>;
48			clock-latency-ns = <500000>;
49		};
50		opp-1700000000 {
51			opp-hz = /bits/ 64 <1700000000>;
52			opp-microvolt = <825000>;
53			clock-latency-ns = <500000>;
54			opp-suspend;
55		};
56		opp-1800000000 {
57			opp-hz = /bits/ 64 <1800000000>;
58			opp-microvolt = <880000>;
59			clock-latency-ns = <500000>;
60			turbo-mode;
61		};
62	};
63
64	cpus {
65		#address-cells = <1>;
66		#size-cells = <0>;
67
68		cpu-map {
69			cluster0 {
70				core0 {
71					cpu = <&a76_0>;
72				};
73				core1 {
74					cpu = <&a76_1>;
75				};
76			};
77
78			cluster1 {
79				core0 {
80					cpu = <&a76_2>;
81				};
82				core1 {
83					cpu = <&a76_3>;
84				};
85			};
86		};
87
88		a76_0: cpu@0 {
89			compatible = "arm,cortex-a76";
90			reg = <0>;
91			device_type = "cpu";
92			power-domains = <&sysc R8A779G0_PD_A1E0D0C0>;
93			next-level-cache = <&L3_CA76_0>;
94			enable-method = "psci";
95			cpu-idle-states = <&CPU_SLEEP_0>;
96			clocks = <&cpg CPG_CORE R8A779G0_CLK_Z0>;
97			operating-points-v2 = <&cluster0_opp>;
98		};
99
100		a76_1: cpu@100 {
101			compatible = "arm,cortex-a76";
102			reg = <0x100>;
103			device_type = "cpu";
104			power-domains = <&sysc R8A779G0_PD_A1E0D0C1>;
105			next-level-cache = <&L3_CA76_0>;
106			enable-method = "psci";
107			cpu-idle-states = <&CPU_SLEEP_0>;
108			clocks = <&cpg CPG_CORE R8A779G0_CLK_Z0>;
109			operating-points-v2 = <&cluster0_opp>;
110		};
111
112		a76_2: cpu@10000 {
113			compatible = "arm,cortex-a76";
114			reg = <0x10000>;
115			device_type = "cpu";
116			power-domains = <&sysc R8A779G0_PD_A1E0D1C0>;
117			next-level-cache = <&L3_CA76_1>;
118			enable-method = "psci";
119			cpu-idle-states = <&CPU_SLEEP_0>;
120			clocks = <&cpg CPG_CORE R8A779G0_CLK_Z0>;
121			operating-points-v2 = <&cluster0_opp>;
122		};
123
124		a76_3: cpu@10100 {
125			compatible = "arm,cortex-a76";
126			reg = <0x10100>;
127			device_type = "cpu";
128			power-domains = <&sysc R8A779G0_PD_A1E0D1C1>;
129			next-level-cache = <&L3_CA76_1>;
130			enable-method = "psci";
131			cpu-idle-states = <&CPU_SLEEP_0>;
132			clocks = <&cpg CPG_CORE R8A779G0_CLK_Z0>;
133			operating-points-v2 = <&cluster0_opp>;
134		};
135
136		idle-states {
137			entry-method = "psci";
138
139			CPU_SLEEP_0: cpu-sleep-0 {
140				compatible = "arm,idle-state";
141				arm,psci-suspend-param = <0x0010000>;
142				local-timer-stop;
143				entry-latency-us = <400>;
144				exit-latency-us = <500>;
145				min-residency-us = <4000>;
146			};
147	       };
148
149		L3_CA76_0: cache-controller-0 {
150			compatible = "cache";
151			power-domains = <&sysc R8A779G0_PD_A2E0D0>;
152			cache-unified;
153			cache-level = <3>;
154		};
155
156		L3_CA76_1: cache-controller-1 {
157			compatible = "cache";
158			power-domains = <&sysc R8A779G0_PD_A2E0D1>;
159			cache-unified;
160			cache-level = <3>;
161		};
162	};
163
164	extal_clk: extal {
165		compatible = "fixed-clock";
166		#clock-cells = <0>;
167		/* This value must be overridden by the board */
168		clock-frequency = <0>;
169	};
170
171	extalr_clk: extalr {
172		compatible = "fixed-clock";
173		#clock-cells = <0>;
174		/* This value must be overridden by the board */
175		clock-frequency = <0>;
176	};
177
178	pmu_a76 {
179		compatible = "arm,cortex-a76-pmu";
180		interrupts-extended = <&gic GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
181	};
182
183	psci {
184		compatible = "arm,psci-1.0", "arm,psci-0.2";
185		method = "smc";
186	};
187
188	/* External SCIF clocks - to be overridden by boards that provide them */
189	scif_clk: scif {
190		compatible = "fixed-clock";
191		#clock-cells = <0>;
192		clock-frequency = <0>;
193	};
194
195	scif_clk2: scif2 {
196		compatible = "fixed-clock";
197		#clock-cells = <0>;
198		clock-frequency = <0>;
199	};
200
201	soc: soc {
202		compatible = "simple-bus";
203		interrupt-parent = <&gic>;
204		#address-cells = <2>;
205		#size-cells = <2>;
206		ranges;
207
208		rwdt: watchdog@e6020000 {
209			compatible = "renesas,r8a779g0-wdt",
210				     "renesas,rcar-gen4-wdt";
211			reg = <0 0xe6020000 0 0x0c>;
212			interrupts = <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>;
213			clocks = <&cpg CPG_MOD 907>;
214			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
215			resets = <&cpg 907>;
216			status = "disabled";
217		};
218
219		pfc: pinctrl@e6050000 {
220			compatible = "renesas,pfc-r8a779g0";
221			reg = <0 0xe6050000 0 0x16c>, <0 0xe6050800 0 0x16c>,
222			      <0 0xe6058000 0 0x16c>, <0 0xe6058800 0 0x16c>,
223			      <0 0xe6060000 0 0x16c>, <0 0xe6060800 0 0x16c>,
224			      <0 0xe6061000 0 0x16c>, <0 0xe6061800 0 0x16c>,
225			      <0 0xe6068000 0 0x16c>;
226		};
227
228		gpio0: gpio@e6050180 {
229			compatible = "renesas,gpio-r8a779g0",
230				     "renesas,rcar-gen4-gpio";
231			reg = <0 0xe6050180 0 0x54>;
232			interrupts = <GIC_SPI 619 IRQ_TYPE_LEVEL_HIGH>;
233			clocks = <&cpg CPG_MOD 915>;
234			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
235			resets = <&cpg 915>;
236			gpio-controller;
237			#gpio-cells = <2>;
238			gpio-ranges = <&pfc 0 0 19>;
239			interrupt-controller;
240			#interrupt-cells = <2>;
241		};
242
243		gpio1: gpio@e6050980 {
244			compatible = "renesas,gpio-r8a779g0",
245				     "renesas,rcar-gen4-gpio";
246			reg = <0 0xe6050980 0 0x54>;
247			interrupts = <GIC_SPI 623 IRQ_TYPE_LEVEL_HIGH>;
248			clocks = <&cpg CPG_MOD 915>;
249			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
250			resets = <&cpg 915>;
251			gpio-controller;
252			#gpio-cells = <2>;
253			gpio-ranges = <&pfc 0 32 29>;
254			interrupt-controller;
255			#interrupt-cells = <2>;
256		};
257
258		gpio2: gpio@e6058180 {
259			compatible = "renesas,gpio-r8a779g0",
260				     "renesas,rcar-gen4-gpio";
261			reg = <0 0xe6058180 0 0x54>;
262			interrupts = <GIC_SPI 627 IRQ_TYPE_LEVEL_HIGH>;
263			clocks = <&cpg CPG_MOD 916>;
264			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
265			resets = <&cpg 916>;
266			gpio-controller;
267			#gpio-cells = <2>;
268			gpio-ranges = <&pfc 0 64 20>;
269			interrupt-controller;
270			#interrupt-cells = <2>;
271		};
272
273		gpio3: gpio@e6058980 {
274			compatible = "renesas,gpio-r8a779g0",
275				     "renesas,rcar-gen4-gpio";
276			reg = <0 0xe6058980 0 0x54>;
277			interrupts = <GIC_SPI 631 IRQ_TYPE_LEVEL_HIGH>;
278			clocks = <&cpg CPG_MOD 916>;
279			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
280			resets = <&cpg 916>;
281			gpio-controller;
282			#gpio-cells = <2>;
283			gpio-ranges = <&pfc 0 96 30>;
284			interrupt-controller;
285			#interrupt-cells = <2>;
286		};
287
288		gpio4: gpio@e6060180 {
289			compatible = "renesas,gpio-r8a779g0",
290				     "renesas,rcar-gen4-gpio";
291			reg = <0 0xe6060180 0 0x54>;
292			interrupts = <GIC_SPI 635 IRQ_TYPE_LEVEL_HIGH>;
293			clocks = <&cpg CPG_MOD 917>;
294			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
295			resets = <&cpg 917>;
296			gpio-controller;
297			#gpio-cells = <2>;
298			gpio-ranges = <&pfc 0 128 25>;
299			interrupt-controller;
300			#interrupt-cells = <2>;
301		};
302
303		gpio5: gpio@e6060980 {
304			compatible = "renesas,gpio-r8a779g0",
305				     "renesas,rcar-gen4-gpio";
306			reg = <0 0xe6060980 0 0x54>;
307			interrupts = <GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH>;
308			clocks = <&cpg CPG_MOD 917>;
309			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
310			resets = <&cpg 917>;
311			gpio-controller;
312			#gpio-cells = <2>;
313			gpio-ranges = <&pfc 0 160 21>;
314			interrupt-controller;
315			#interrupt-cells = <2>;
316		};
317
318		gpio6: gpio@e6061180 {
319			compatible = "renesas,gpio-r8a779g0",
320				     "renesas,rcar-gen4-gpio";
321			reg = <0 0xe6061180 0 0x54>;
322			interrupts = <GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH>;
323			clocks = <&cpg CPG_MOD 917>;
324			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
325			resets = <&cpg 917>;
326			gpio-controller;
327			#gpio-cells = <2>;
328			gpio-ranges = <&pfc 0 192 21>;
329			interrupt-controller;
330			#interrupt-cells = <2>;
331		};
332
333		gpio7: gpio@e6061980 {
334			compatible = "renesas,gpio-r8a779g0",
335				     "renesas,rcar-gen4-gpio";
336			reg = <0 0xe6061980 0 0x54>;
337			interrupts = <GIC_SPI 647 IRQ_TYPE_LEVEL_HIGH>;
338			clocks = <&cpg CPG_MOD 917>;
339			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
340			resets = <&cpg 917>;
341			gpio-controller;
342			#gpio-cells = <2>;
343			gpio-ranges = <&pfc 0 224 21>;
344			interrupt-controller;
345			#interrupt-cells = <2>;
346		};
347
348		gpio8: gpio@e6068180 {
349			compatible = "renesas,gpio-r8a779g0",
350				     "renesas,rcar-gen4-gpio";
351			reg = <0 0xe6068180 0 0x54>;
352			interrupts = <GIC_SPI 651 IRQ_TYPE_LEVEL_HIGH>;
353			clocks = <&cpg CPG_MOD 918>;
354			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
355			resets = <&cpg 918>;
356			gpio-controller;
357			#gpio-cells = <2>;
358			gpio-ranges = <&pfc 0 256 14>;
359			interrupt-controller;
360			#interrupt-cells = <2>;
361		};
362
363		cmt0: timer@e60f0000 {
364			compatible = "renesas,r8a779g0-cmt0",
365				     "renesas,rcar-gen4-cmt0";
366			reg = <0 0xe60f0000 0 0x1004>;
367			interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
368				     <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
369			clocks = <&cpg CPG_MOD 910>;
370			clock-names = "fck";
371			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
372			resets = <&cpg 910>;
373			status = "disabled";
374		};
375
376		cmt1: timer@e6130000 {
377			compatible = "renesas,r8a779g0-cmt1",
378				     "renesas,rcar-gen4-cmt1";
379			reg = <0 0xe6130000 0 0x1004>;
380			interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>,
381				     <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>,
382				     <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>,
383				     <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>,
384				     <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>,
385				     <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>,
386				     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
387				     <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
388			clocks = <&cpg CPG_MOD 911>;
389			clock-names = "fck";
390			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
391			resets = <&cpg 911>;
392			status = "disabled";
393		};
394
395		cmt2: timer@e6140000 {
396			compatible = "renesas,r8a779g0-cmt1",
397				     "renesas,rcar-gen4-cmt1";
398			reg = <0 0xe6140000 0 0x1004>;
399			interrupts = <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>,
400				     <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>,
401				     <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>,
402				     <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>,
403				     <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>,
404				     <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>,
405				     <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>,
406				     <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>;
407			clocks = <&cpg CPG_MOD 912>;
408			clock-names = "fck";
409			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
410			resets = <&cpg 912>;
411			status = "disabled";
412		};
413
414		cmt3: timer@e6148000 {
415			compatible = "renesas,r8a779g0-cmt1",
416				     "renesas,rcar-gen4-cmt1";
417			reg = <0 0xe6148000 0 0x1004>;
418			interrupts = <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>,
419				     <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
420				     <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>,
421				     <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>,
422				     <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>,
423				     <GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>,
424				     <GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>,
425				     <GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>;
426			clocks = <&cpg CPG_MOD 913>;
427			clock-names = "fck";
428			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
429			resets = <&cpg 913>;
430			status = "disabled";
431		};
432
433		cpg: clock-controller@e6150000 {
434			compatible = "renesas,r8a779g0-cpg-mssr";
435			reg = <0 0xe6150000 0 0x4000>;
436			clocks = <&extal_clk>, <&extalr_clk>;
437			clock-names = "extal", "extalr";
438			#clock-cells = <2>;
439			#power-domain-cells = <0>;
440			#reset-cells = <1>;
441		};
442
443		rst: reset-controller@e6160000 {
444			compatible = "renesas,r8a779g0-rst";
445			reg = <0 0xe6160000 0 0x4000>;
446		};
447
448		sysc: system-controller@e6180000 {
449			compatible = "renesas,r8a779g0-sysc";
450			reg = <0 0xe6180000 0 0x4000>;
451			#power-domain-cells = <1>;
452		};
453
454		tsc: thermal@e6198000 {
455			compatible = "renesas,r8a779g0-thermal";
456			reg = <0 0xe6198000 0 0x200>,
457			      <0 0xe61a0000 0 0x200>,
458			      <0 0xe61a8000 0 0x200>,
459			      <0 0xe61b0000 0 0x200>;
460			clocks = <&cpg CPG_MOD 919>;
461			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
462			resets = <&cpg 919>;
463			#thermal-sensor-cells = <1>;
464		};
465
466		intc_ex: interrupt-controller@e61c0000 {
467			compatible = "renesas,intc-ex-r8a779g0", "renesas,irqc";
468			#interrupt-cells = <2>;
469			interrupt-controller;
470			reg = <0 0xe61c0000 0 0x200>;
471			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
472				     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
473				     <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
474				     <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
475				     <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
476				     <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
477			clocks = <&cpg CPG_MOD 611>;
478			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
479			resets = <&cpg 611>;
480		};
481
482		tmu0: timer@e61e0000 {
483			compatible = "renesas,tmu-r8a779g0", "renesas,tmu";
484			reg = <0 0xe61e0000 0 0x30>;
485			interrupts = <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>,
486				     <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>,
487				     <GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH>;
488			clocks = <&cpg CPG_MOD 713>;
489			clock-names = "fck";
490			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
491			resets = <&cpg 713>;
492			status = "disabled";
493		};
494
495		tmu1: timer@e6fc0000 {
496			compatible = "renesas,tmu-r8a779g0", "renesas,tmu";
497			reg = <0 0xe6fc0000 0 0x30>;
498			interrupts = <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>,
499				     <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>,
500				     <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>;
501			clocks = <&cpg CPG_MOD 714>;
502			clock-names = "fck";
503			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
504			resets = <&cpg 714>;
505			status = "disabled";
506		};
507
508		tmu2: timer@e6fd0000 {
509			compatible = "renesas,tmu-r8a779g0", "renesas,tmu";
510			reg = <0 0xe6fd0000 0 0x30>;
511			interrupts = <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>,
512				     <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>,
513				     <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>;
514			clocks = <&cpg CPG_MOD 715>;
515			clock-names = "fck";
516			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
517			resets = <&cpg 715>;
518			status = "disabled";
519		};
520
521		tmu3: timer@e6fe0000 {
522			compatible = "renesas,tmu-r8a779g0", "renesas,tmu";
523			reg = <0 0xe6fe0000 0 0x30>;
524			interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>,
525				     <GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>,
526				     <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>;
527			clocks = <&cpg CPG_MOD 716>;
528			clock-names = "fck";
529			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
530			resets = <&cpg 716>;
531			status = "disabled";
532		};
533
534		tmu4: timer@ffc00000 {
535			compatible = "renesas,tmu-r8a779g0", "renesas,tmu";
536			reg = <0 0xffc00000 0 0x30>;
537			interrupts = <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
538				     <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
539				     <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
540			clocks = <&cpg CPG_MOD 717>;
541			clock-names = "fck";
542			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
543			resets = <&cpg 717>;
544			status = "disabled";
545		};
546
547		i2c0: i2c@e6500000 {
548			compatible = "renesas,i2c-r8a779g0",
549				     "renesas,rcar-gen4-i2c";
550			reg = <0 0xe6500000 0 0x40>;
551			interrupts = <GIC_SPI 610 IRQ_TYPE_LEVEL_HIGH>;
552			clocks = <&cpg CPG_MOD 518>;
553			dmas = <&dmac0 0x91>, <&dmac0 0x90>,
554			       <&dmac1 0x91>, <&dmac1 0x90>;
555			dma-names = "tx", "rx", "tx", "rx";
556			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
557			resets = <&cpg 518>;
558			i2c-scl-internal-delay-ns = <110>;
559			#address-cells = <1>;
560			#size-cells = <0>;
561			status = "disabled";
562		};
563
564		i2c1: i2c@e6508000 {
565			compatible = "renesas,i2c-r8a779g0",
566				     "renesas,rcar-gen4-i2c";
567			reg = <0 0xe6508000 0 0x40>;
568			interrupts = <GIC_SPI 611 IRQ_TYPE_LEVEL_HIGH>;
569			clocks = <&cpg CPG_MOD 519>;
570			dmas = <&dmac0 0x93>, <&dmac0 0x92>,
571			       <&dmac1 0x93>, <&dmac1 0x92>;
572			dma-names = "tx", "rx", "tx", "rx";
573			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
574			resets = <&cpg 519>;
575			i2c-scl-internal-delay-ns = <110>;
576			#address-cells = <1>;
577			#size-cells = <0>;
578			status = "disabled";
579		};
580
581		i2c2: i2c@e6510000 {
582			compatible = "renesas,i2c-r8a779g0",
583				     "renesas,rcar-gen4-i2c";
584			reg = <0 0xe6510000 0 0x40>;
585			interrupts = <GIC_SPI 612 IRQ_TYPE_LEVEL_HIGH>;
586			clocks = <&cpg CPG_MOD 520>;
587			dmas = <&dmac0 0x95>, <&dmac0 0x94>,
588			       <&dmac1 0x95>, <&dmac1 0x94>;
589			dma-names = "tx", "rx", "tx", "rx";
590			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
591			resets = <&cpg 520>;
592			i2c-scl-internal-delay-ns = <110>;
593			#address-cells = <1>;
594			#size-cells = <0>;
595			status = "disabled";
596		};
597
598		i2c3: i2c@e66d0000 {
599			compatible = "renesas,i2c-r8a779g0",
600				     "renesas,rcar-gen4-i2c";
601			reg = <0 0xe66d0000 0 0x40>;
602			interrupts = <GIC_SPI 613 IRQ_TYPE_LEVEL_HIGH>;
603			clocks = <&cpg CPG_MOD 521>;
604			dmas = <&dmac0 0x97>, <&dmac0 0x96>,
605			       <&dmac1 0x97>, <&dmac1 0x96>;
606			dma-names = "tx", "rx", "tx", "rx";
607			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
608			resets = <&cpg 521>;
609			i2c-scl-internal-delay-ns = <110>;
610			#address-cells = <1>;
611			#size-cells = <0>;
612			status = "disabled";
613		};
614
615		i2c4: i2c@e66d8000 {
616			compatible = "renesas,i2c-r8a779g0",
617				     "renesas,rcar-gen4-i2c";
618			reg = <0 0xe66d8000 0 0x40>;
619			interrupts = <GIC_SPI 614 IRQ_TYPE_LEVEL_HIGH>;
620			clocks = <&cpg CPG_MOD 522>;
621			dma-names = "tx", "rx", "tx", "rx";
622			dmas = <&dmac0 0x99>, <&dmac0 0x98>,
623			       <&dmac1 0x99>, <&dmac1 0x98>;
624			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
625			resets = <&cpg 522>;
626			i2c-scl-internal-delay-ns = <110>;
627			#address-cells = <1>;
628			#size-cells = <0>;
629			status = "disabled";
630		};
631
632		i2c5: i2c@e66e0000 {
633			compatible = "renesas,i2c-r8a779g0",
634				     "renesas,rcar-gen4-i2c";
635			reg = <0 0xe66e0000 0 0x40>;
636			interrupts = <GIC_SPI 615 IRQ_TYPE_LEVEL_HIGH>;
637			clocks = <&cpg CPG_MOD 523>;
638			dmas = <&dmac0 0x9b>, <&dmac0 0x9a>,
639			       <&dmac1 0x9b>, <&dmac1 0x9a>;
640			dma-names = "tx", "rx", "tx", "rx";
641			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
642			resets = <&cpg 523>;
643			i2c-scl-internal-delay-ns = <110>;
644			#address-cells = <1>;
645			#size-cells = <0>;
646			status = "disabled";
647		};
648
649		hscif0: serial@e6540000 {
650			compatible = "renesas,hscif-r8a779g0",
651				     "renesas,rcar-gen4-hscif", "renesas,hscif";
652			reg = <0 0xe6540000 0 0x60>;
653			interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
654			clocks = <&cpg CPG_MOD 514>,
655				 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>,
656				 <&scif_clk>;
657			clock-names = "fck", "brg_int", "scif_clk";
658			dmas = <&dmac0 0x31>, <&dmac0 0x30>,
659			       <&dmac1 0x31>, <&dmac1 0x30>;
660			dma-names = "tx", "rx", "tx", "rx";
661			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
662			resets = <&cpg 514>;
663			status = "disabled";
664		};
665
666		hscif1: serial@e6550000 {
667			compatible = "renesas,hscif-r8a779g0",
668				     "renesas,rcar-gen4-hscif", "renesas,hscif";
669			reg = <0 0xe6550000 0 0x60>;
670			interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
671			clocks = <&cpg CPG_MOD 515>,
672				 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>,
673				 <&scif_clk>;
674			clock-names = "fck", "brg_int", "scif_clk";
675			dmas = <&dmac0 0x33>, <&dmac0 0x32>,
676			       <&dmac1 0x33>, <&dmac1 0x32>;
677			dma-names = "tx", "rx", "tx", "rx";
678			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
679			resets = <&cpg 515>;
680			status = "disabled";
681		};
682
683		hscif2: serial@e6560000 {
684			compatible = "renesas,hscif-r8a779g0",
685				     "renesas,rcar-gen4-hscif", "renesas,hscif";
686			reg = <0 0xe6560000 0 0x60>;
687			interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>;
688			clocks = <&cpg CPG_MOD 516>,
689				 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>,
690				 <&scif_clk2>;
691			clock-names = "fck", "brg_int", "scif_clk";
692			dmas = <&dmac0 0x35>, <&dmac0 0x34>,
693			       <&dmac1 0x35>, <&dmac1 0x34>;
694			dma-names = "tx", "rx", "tx", "rx";
695			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
696			resets = <&cpg 516>;
697			status = "disabled";
698		};
699
700		hscif3: serial@e66a0000 {
701			compatible = "renesas,hscif-r8a779g0",
702				     "renesas,rcar-gen4-hscif", "renesas,hscif";
703			reg = <0 0xe66a0000 0 0x60>;
704			interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>;
705			clocks = <&cpg CPG_MOD 517>,
706				 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>,
707				 <&scif_clk>;
708			clock-names = "fck", "brg_int", "scif_clk";
709			dmas = <&dmac0 0x37>, <&dmac0 0x36>,
710			       <&dmac1 0x37>, <&dmac1 0x36>;
711			dma-names = "tx", "rx", "tx", "rx";
712			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
713			resets = <&cpg 517>;
714			status = "disabled";
715		};
716
717		canfd: can@e6660000 {
718			compatible = "renesas,r8a779g0-canfd",
719				     "renesas,rcar-gen4-canfd";
720			reg = <0 0xe6660000 0 0x8500>;
721			interrupts = <GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>,
722				     <GIC_SPI 413 IRQ_TYPE_LEVEL_HIGH>;
723			interrupt-names = "ch_int", "g_int";
724			clocks = <&cpg CPG_MOD 328>,
725				 <&cpg CPG_CORE R8A779G0_CLK_CANFD>,
726				 <&can_clk>;
727			clock-names = "fck", "canfd", "can_clk";
728			assigned-clocks = <&cpg CPG_CORE R8A779G0_CLK_CANFD>;
729			assigned-clock-rates = <80000000>;
730			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
731			resets = <&cpg 328>;
732			status = "disabled";
733
734			channel0 {
735				status = "disabled";
736			};
737
738			channel1 {
739				status = "disabled";
740			};
741
742			channel2 {
743				status = "disabled";
744			};
745
746			channel3 {
747				status = "disabled";
748			};
749
750			channel4 {
751				status = "disabled";
752			};
753
754			channel5 {
755				status = "disabled";
756			};
757
758			channel6 {
759				status = "disabled";
760			};
761
762			channel7 {
763				status = "disabled";
764			};
765		};
766
767		avb0: ethernet@e6800000 {
768			compatible = "renesas,etheravb-r8a779g0",
769				     "renesas,etheravb-rcar-gen4";
770			reg = <0 0xe6800000 0 0x1000>;
771			interrupts = <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
772				     <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
773				     <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
774				     <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
775				     <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
776				     <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
777				     <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
778				     <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
779				     <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
780				     <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
781				     <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
782				     <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
783				     <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
784				     <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
785				     <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>,
786				     <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
787				     <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
788				     <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>,
789				     <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>,
790				     <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>,
791				     <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>,
792				     <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>,
793				     <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>,
794				     <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>,
795				     <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
796			interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4",
797					  "ch5", "ch6", "ch7", "ch8", "ch9",
798					  "ch10", "ch11", "ch12", "ch13",
799					  "ch14", "ch15", "ch16", "ch17",
800					  "ch18", "ch19", "ch20", "ch21",
801					  "ch22", "ch23", "ch24";
802			clocks = <&cpg CPG_MOD 211>;
803			clock-names = "fck";
804			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
805			resets = <&cpg 211>;
806			phy-mode = "rgmii";
807			rx-internal-delay-ps = <0>;
808			tx-internal-delay-ps = <0>;
809			#address-cells = <1>;
810			#size-cells = <0>;
811			status = "disabled";
812		};
813
814		avb1: ethernet@e6810000 {
815			compatible = "renesas,etheravb-r8a779g0",
816				     "renesas,etheravb-rcar-gen4";
817			reg = <0 0xe6810000 0 0x1000>;
818			interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>,
819				     <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>,
820				     <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>,
821				     <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>,
822				     <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>,
823				     <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>,
824				     <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>,
825				     <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>,
826				     <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>,
827				     <GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>,
828				     <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>,
829				     <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>,
830				     <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>,
831				     <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>,
832				     <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>,
833				     <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>,
834				     <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>,
835				     <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>,
836				     <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>,
837				     <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>,
838				     <GIC_SPI 380 IRQ_TYPE_LEVEL_HIGH>,
839				     <GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>,
840				     <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>,
841				     <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>,
842				     <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>;
843			interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4",
844					  "ch5", "ch6", "ch7", "ch8", "ch9",
845					  "ch10", "ch11", "ch12", "ch13",
846					  "ch14", "ch15", "ch16", "ch17",
847					  "ch18", "ch19", "ch20", "ch21",
848					  "ch22", "ch23", "ch24";
849			clocks = <&cpg CPG_MOD 212>;
850			clock-names = "fck";
851			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
852			resets = <&cpg 212>;
853			phy-mode = "rgmii";
854			rx-internal-delay-ps = <0>;
855			tx-internal-delay-ps = <0>;
856			#address-cells = <1>;
857			#size-cells = <0>;
858			status = "disabled";
859		};
860
861		avb2: ethernet@e6820000 {
862			compatible = "renesas,etheravb-r8a779g0",
863				     "renesas,etheravb-rcar-gen4";
864			reg = <0 0xe6820000 0 0x1000>;
865			interrupts = <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>,
866				     <GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH>,
867				     <GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH>,
868				     <GIC_SPI 388 IRQ_TYPE_LEVEL_HIGH>,
869				     <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>,
870				     <GIC_SPI 390 IRQ_TYPE_LEVEL_HIGH>,
871				     <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>,
872				     <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>,
873				     <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>,
874				     <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH>,
875				     <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>,
876				     <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>,
877				     <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>,
878				     <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
879				     <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
880				     <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
881				     <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
882				     <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
883				     <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
884				     <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
885				     <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>,
886				     <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
887				     <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
888				     <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>,
889				     <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>;
890			interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4",
891					  "ch5", "ch6", "ch7", "ch8", "ch9",
892					  "ch10", "ch11", "ch12", "ch13",
893					  "ch14", "ch15", "ch16", "ch17",
894					  "ch18", "ch19", "ch20", "ch21",
895					  "ch22", "ch23", "ch24";
896			clocks = <&cpg CPG_MOD 213>;
897			clock-names = "fck";
898			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
899			resets = <&cpg 213>;
900			phy-mode = "rgmii";
901			rx-internal-delay-ps = <0>;
902			tx-internal-delay-ps = <0>;
903			#address-cells = <1>;
904			#size-cells = <0>;
905			status = "disabled";
906		};
907
908		pwm0: pwm@e6e30000 {
909			compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar";
910			reg = <0 0xe6e30000 0 0x10>;
911			#pwm-cells = <2>;
912			clocks = <&cpg CPG_MOD 628>;
913			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
914			resets = <&cpg 628>;
915			status = "disabled";
916		};
917
918		pwm1: pwm@e6e31000 {
919			compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar";
920			reg = <0 0xe6e31000 0 0x10>;
921			#pwm-cells = <2>;
922			clocks = <&cpg CPG_MOD 628>;
923			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
924			resets = <&cpg 628>;
925			status = "disabled";
926		};
927
928		pwm2: pwm@e6e32000 {
929			compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar";
930			reg = <0 0xe6e32000 0 0x10>;
931			#pwm-cells = <2>;
932			clocks = <&cpg CPG_MOD 628>;
933			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
934			resets = <&cpg 628>;
935			status = "disabled";
936		};
937
938		pwm3: pwm@e6e33000 {
939			compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar";
940			reg = <0 0xe6e33000 0 0x10>;
941			#pwm-cells = <2>;
942			clocks = <&cpg CPG_MOD 628>;
943			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
944			resets = <&cpg 628>;
945			status = "disabled";
946		};
947
948		pwm4: pwm@e6e34000 {
949			compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar";
950			reg = <0 0xe6e34000 0 0x10>;
951			#pwm-cells = <2>;
952			clocks = <&cpg CPG_MOD 628>;
953			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
954			resets = <&cpg 628>;
955			status = "disabled";
956		};
957
958		pwm5: pwm@e6e35000 {
959			compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar";
960			reg = <0 0xe6e35000 0 0x10>;
961			#pwm-cells = <2>;
962			clocks = <&cpg CPG_MOD 628>;
963			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
964			resets = <&cpg 628>;
965			status = "disabled";
966		};
967
968		pwm6: pwm@e6e36000 {
969			compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar";
970			reg = <0 0xe6e36000 0 0x10>;
971			#pwm-cells = <2>;
972			clocks = <&cpg CPG_MOD 628>;
973			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
974			resets = <&cpg 628>;
975			status = "disabled";
976		};
977
978		pwm7: pwm@e6e37000 {
979			compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar";
980			reg = <0 0xe6e37000 0 0x10>;
981			#pwm-cells = <2>;
982			clocks = <&cpg CPG_MOD 628>;
983			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
984			resets = <&cpg 628>;
985			status = "disabled";
986		};
987
988		pwm8: pwm@e6e38000 {
989			compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar";
990			reg = <0 0xe6e38000 0 0x10>;
991			#pwm-cells = <2>;
992			clocks = <&cpg CPG_MOD 628>;
993			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
994			resets = <&cpg 628>;
995			status = "disabled";
996		};
997
998		pwm9: pwm@e6e39000 {
999			compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar";
1000			reg = <0 0xe6e39000 0 0x10>;
1001			#pwm-cells = <2>;
1002			clocks = <&cpg CPG_MOD 628>;
1003			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1004			resets = <&cpg 628>;
1005			status = "disabled";
1006		};
1007
1008		scif0: serial@e6e60000 {
1009			compatible = "renesas,scif-r8a779g0",
1010				     "renesas,rcar-gen4-scif", "renesas,scif";
1011			reg = <0 0xe6e60000 0 64>;
1012			interrupts = <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>;
1013			clocks = <&cpg CPG_MOD 702>,
1014				 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>,
1015				 <&scif_clk>;
1016			clock-names = "fck", "brg_int", "scif_clk";
1017			dmas = <&dmac0 0x51>, <&dmac0 0x50>,
1018			       <&dmac1 0x51>, <&dmac1 0x50>;
1019			dma-names = "tx", "rx", "tx", "rx";
1020			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1021			resets = <&cpg 702>;
1022			status = "disabled";
1023		};
1024
1025		scif1: serial@e6e68000 {
1026			compatible = "renesas,scif-r8a779g0",
1027				     "renesas,rcar-gen4-scif", "renesas,scif";
1028			reg = <0 0xe6e68000 0 64>;
1029			interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>;
1030			clocks = <&cpg CPG_MOD 703>,
1031				 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>,
1032				 <&scif_clk>;
1033			clock-names = "fck", "brg_int", "scif_clk";
1034			dmas = <&dmac0 0x53>, <&dmac0 0x52>,
1035			       <&dmac1 0x53>, <&dmac1 0x52>;
1036			dma-names = "tx", "rx", "tx", "rx";
1037			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1038			resets = <&cpg 703>;
1039			status = "disabled";
1040		};
1041
1042		scif3: serial@e6c50000 {
1043			compatible = "renesas,scif-r8a779g0",
1044				     "renesas,rcar-gen4-scif", "renesas,scif";
1045			reg = <0 0xe6c50000 0 64>;
1046			interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>;
1047			clocks = <&cpg CPG_MOD 704>,
1048				 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>,
1049				 <&scif_clk>;
1050			clock-names = "fck", "brg_int", "scif_clk";
1051			dmas = <&dmac0 0x57>, <&dmac0 0x56>,
1052			       <&dmac1 0x57>, <&dmac1 0x56>;
1053			dma-names = "tx", "rx", "tx", "rx";
1054			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1055			resets = <&cpg 704>;
1056			status = "disabled";
1057		};
1058
1059		scif4: serial@e6c40000 {
1060			compatible = "renesas,scif-r8a779g0",
1061				     "renesas,rcar-gen4-scif", "renesas,scif";
1062			reg = <0 0xe6c40000 0 64>;
1063			interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>;
1064			clocks = <&cpg CPG_MOD 705>,
1065				 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>,
1066				 <&scif_clk2>;
1067			clock-names = "fck", "brg_int", "scif_clk";
1068			dmas = <&dmac0 0x59>, <&dmac0 0x58>,
1069			       <&dmac1 0x59>, <&dmac1 0x58>;
1070			dma-names = "tx", "rx", "tx", "rx";
1071			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1072			resets = <&cpg 705>;
1073			status = "disabled";
1074		};
1075
1076		tpu: pwm@e6e80000 {
1077			compatible = "renesas,tpu-r8a779g0", "renesas,tpu";
1078			reg = <0 0xe6e80000 0 0x148>;
1079			interrupts = <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>;
1080			clocks = <&cpg CPG_MOD 718>;
1081			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1082			resets = <&cpg 718>;
1083			#pwm-cells = <3>;
1084			status = "disabled";
1085		};
1086
1087		msiof0: spi@e6e90000 {
1088			compatible = "renesas,msiof-r8a779g0",
1089				     "renesas,rcar-gen4-msiof";
1090			reg = <0 0xe6e90000 0 0x0064>;
1091			interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
1092			clocks = <&cpg CPG_MOD 618>;
1093			dmas = <&dmac0 0x41>, <&dmac0 0x40>,
1094			       <&dmac1 0x41>, <&dmac1 0x40>;
1095			dma-names = "tx", "rx", "tx", "rx";
1096			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1097			resets = <&cpg 618>;
1098			#address-cells = <1>;
1099			#size-cells = <0>;
1100			status = "disabled";
1101		};
1102
1103		msiof1: spi@e6ea0000 {
1104			compatible = "renesas,msiof-r8a779g0",
1105				     "renesas,rcar-gen4-msiof";
1106			reg = <0 0xe6ea0000 0 0x0064>;
1107			interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>;
1108			clocks = <&cpg CPG_MOD 619>;
1109			dmas = <&dmac0 0x43>, <&dmac0 0x42>,
1110			       <&dmac1 0x43>, <&dmac1 0x42>;
1111			dma-names = "tx", "rx", "tx", "rx";
1112			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1113			resets = <&cpg 619>;
1114			#address-cells = <1>;
1115			#size-cells = <0>;
1116			status = "disabled";
1117		};
1118
1119		msiof2: spi@e6c00000 {
1120			compatible = "renesas,msiof-r8a779g0",
1121				     "renesas,rcar-gen4-msiof";
1122			reg = <0 0xe6c00000 0 0x0064>;
1123			interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
1124			clocks = <&cpg CPG_MOD 620>;
1125			dmas = <&dmac0 0x45>, <&dmac0 0x44>,
1126			       <&dmac1 0x45>, <&dmac1 0x44>;
1127			dma-names = "tx", "rx", "tx", "rx";
1128			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1129			resets = <&cpg 620>;
1130			#address-cells = <1>;
1131			#size-cells = <0>;
1132			status = "disabled";
1133		};
1134
1135		msiof3: spi@e6c10000 {
1136			compatible = "renesas,msiof-r8a779g0",
1137				     "renesas,rcar-gen4-msiof";
1138			reg = <0 0xe6c10000 0 0x0064>;
1139			interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>;
1140			clocks = <&cpg CPG_MOD 621>;
1141			dmas = <&dmac0 0x47>, <&dmac0 0x46>,
1142			       <&dmac1 0x47>, <&dmac1 0x46>;
1143			dma-names = "tx", "rx", "tx", "rx";
1144			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1145			resets = <&cpg 621>;
1146			#address-cells = <1>;
1147			#size-cells = <0>;
1148			status = "disabled";
1149		};
1150
1151		msiof4: spi@e6c20000 {
1152			compatible = "renesas,msiof-r8a779g0",
1153				     "renesas,rcar-gen4-msiof";
1154			reg = <0 0xe6c20000 0 0x0064>;
1155			interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>;
1156			clocks = <&cpg CPG_MOD 622>;
1157			dmas = <&dmac0 0x49>, <&dmac0 0x48>,
1158			       <&dmac1 0x49>, <&dmac1 0x48>;
1159			dma-names = "tx", "rx", "tx", "rx";
1160			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1161			resets = <&cpg 622>;
1162			#address-cells = <1>;
1163			#size-cells = <0>;
1164			status = "disabled";
1165		};
1166
1167		msiof5: spi@e6c28000 {
1168			compatible = "renesas,msiof-r8a779g0",
1169				     "renesas,rcar-gen4-msiof";
1170			reg = <0 0xe6c28000 0 0x0064>;
1171			interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>;
1172			clocks = <&cpg CPG_MOD 623>;
1173			dmas = <&dmac0 0x4b>, <&dmac0 0x4a>,
1174			       <&dmac1 0x4b>, <&dmac1 0x4a>;
1175			dma-names = "tx", "rx", "tx", "rx";
1176			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1177			resets = <&cpg 623>;
1178			#address-cells = <1>;
1179			#size-cells = <0>;
1180			status = "disabled";
1181		};
1182
1183		vin00: video@e6ef0000 {
1184			compatible = "renesas,vin-r8a779g0";
1185			reg = <0 0xe6ef0000 0 0x1000>;
1186			interrupts = <GIC_SPI 529 IRQ_TYPE_LEVEL_HIGH>;
1187			clocks = <&cpg CPG_MOD 730>;
1188			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1189			resets = <&cpg 730>;
1190			renesas,id = <0>;
1191			status = "disabled";
1192
1193			ports {
1194				#address-cells = <1>;
1195				#size-cells = <0>;
1196
1197				port@2 {
1198					#address-cells = <1>;
1199					#size-cells = <0>;
1200
1201					reg = <2>;
1202
1203					vin00isp0: endpoint@0 {
1204						reg = <0>;
1205						remote-endpoint = <&isp0vin00>;
1206					};
1207				};
1208			};
1209		};
1210
1211		vin01: video@e6ef1000 {
1212			compatible = "renesas,vin-r8a779g0";
1213			reg = <0 0xe6ef1000 0 0x1000>;
1214			interrupts = <GIC_SPI 530 IRQ_TYPE_LEVEL_HIGH>;
1215			clocks = <&cpg CPG_MOD 731>;
1216			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1217			resets = <&cpg 731>;
1218			renesas,id = <1>;
1219			status = "disabled";
1220
1221			ports {
1222				#address-cells = <1>;
1223				#size-cells = <0>;
1224
1225				port@2 {
1226					#address-cells = <1>;
1227					#size-cells = <0>;
1228
1229					reg = <2>;
1230
1231					vin01isp0: endpoint@0 {
1232						reg = <0>;
1233						remote-endpoint = <&isp0vin01>;
1234					};
1235				};
1236			};
1237		};
1238
1239		vin02: video@e6ef2000 {
1240			compatible = "renesas,vin-r8a779g0";
1241			reg = <0 0xe6ef2000 0 0x1000>;
1242			interrupts = <GIC_SPI 531 IRQ_TYPE_LEVEL_HIGH>;
1243			clocks = <&cpg CPG_MOD 800>;
1244			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1245			resets = <&cpg 800>;
1246			renesas,id = <2>;
1247			status = "disabled";
1248
1249			ports {
1250				#address-cells = <1>;
1251				#size-cells = <0>;
1252
1253				port@2 {
1254					#address-cells = <1>;
1255					#size-cells = <0>;
1256
1257					reg = <2>;
1258
1259					vin02isp0: endpoint@0 {
1260						reg = <0>;
1261						remote-endpoint = <&isp0vin02>;
1262					};
1263				};
1264			};
1265		};
1266
1267		vin03: video@e6ef3000 {
1268			compatible = "renesas,vin-r8a779g0";
1269			reg = <0 0xe6ef3000 0 0x1000>;
1270			interrupts = <GIC_SPI 532 IRQ_TYPE_LEVEL_HIGH>;
1271			clocks = <&cpg CPG_MOD 801>;
1272			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1273			resets = <&cpg 801>;
1274			renesas,id = <3>;
1275			status = "disabled";
1276
1277			ports {
1278				#address-cells = <1>;
1279				#size-cells = <0>;
1280
1281				port@2 {
1282					#address-cells = <1>;
1283					#size-cells = <0>;
1284
1285					reg = <2>;
1286
1287					vin03isp0: endpoint@0 {
1288						reg = <0>;
1289						remote-endpoint = <&isp0vin03>;
1290					};
1291				};
1292			};
1293		};
1294
1295		vin04: video@e6ef4000 {
1296			compatible = "renesas,vin-r8a779g0";
1297			reg = <0 0xe6ef4000 0 0x1000>;
1298			interrupts = <GIC_SPI 533 IRQ_TYPE_LEVEL_HIGH>;
1299			clocks = <&cpg CPG_MOD 802>;
1300			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1301			resets = <&cpg 802>;
1302			renesas,id = <4>;
1303			status = "disabled";
1304
1305			ports {
1306				#address-cells = <1>;
1307				#size-cells = <0>;
1308
1309				port@2 {
1310					#address-cells = <1>;
1311					#size-cells = <0>;
1312
1313					reg = <2>;
1314
1315					vin04isp0: endpoint@0 {
1316						reg = <0>;
1317						remote-endpoint = <&isp0vin04>;
1318					};
1319				};
1320			};
1321		};
1322
1323		vin05: video@e6ef5000 {
1324			compatible = "renesas,vin-r8a779g0";
1325			reg = <0 0xe6ef5000 0 0x1000>;
1326			interrupts = <GIC_SPI 534 IRQ_TYPE_LEVEL_HIGH>;
1327			clocks = <&cpg CPG_MOD 803>;
1328			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1329			resets = <&cpg 803>;
1330			renesas,id = <5>;
1331			status = "disabled";
1332
1333			ports {
1334				#address-cells = <1>;
1335				#size-cells = <0>;
1336
1337				port@2 {
1338					#address-cells = <1>;
1339					#size-cells = <0>;
1340
1341					reg = <2>;
1342
1343					vin05isp0: endpoint@0 {
1344						reg = <0>;
1345						remote-endpoint = <&isp0vin05>;
1346					};
1347				};
1348			};
1349		};
1350
1351		vin06: video@e6ef6000 {
1352			compatible = "renesas,vin-r8a779g0";
1353			reg = <0 0xe6ef6000 0 0x1000>;
1354			interrupts = <GIC_SPI 535 IRQ_TYPE_LEVEL_HIGH>;
1355			clocks = <&cpg CPG_MOD 804>;
1356			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1357			resets = <&cpg 804>;
1358			renesas,id = <6>;
1359			status = "disabled";
1360
1361			ports {
1362				#address-cells = <1>;
1363				#size-cells = <0>;
1364
1365				port@2 {
1366					#address-cells = <1>;
1367					#size-cells = <0>;
1368
1369					reg = <2>;
1370
1371					vin06isp0: endpoint@0 {
1372						reg = <0>;
1373						remote-endpoint = <&isp0vin06>;
1374					};
1375				};
1376			};
1377		};
1378
1379		vin07: video@e6ef7000 {
1380			compatible = "renesas,vin-r8a779g0";
1381			reg = <0 0xe6ef7000 0 0x1000>;
1382			interrupts = <GIC_SPI 536 IRQ_TYPE_LEVEL_HIGH>;
1383			clocks = <&cpg CPG_MOD 805>;
1384			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1385			resets = <&cpg 805>;
1386			renesas,id = <7>;
1387			status = "disabled";
1388
1389			ports {
1390				#address-cells = <1>;
1391				#size-cells = <0>;
1392
1393				port@2 {
1394					#address-cells = <1>;
1395					#size-cells = <0>;
1396
1397					reg = <2>;
1398
1399					vin07isp0: endpoint@0 {
1400						reg = <0>;
1401						remote-endpoint = <&isp0vin07>;
1402					};
1403				};
1404			};
1405		};
1406
1407		vin08: video@e6ef8000 {
1408			compatible = "renesas,vin-r8a779g0";
1409			reg = <0 0xe6ef8000 0 0x1000>;
1410			interrupts = <GIC_SPI 537 IRQ_TYPE_LEVEL_HIGH>;
1411			clocks = <&cpg CPG_MOD 806>;
1412			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1413			resets = <&cpg 806>;
1414			renesas,id = <8>;
1415			status = "disabled";
1416
1417			ports {
1418				#address-cells = <1>;
1419				#size-cells = <0>;
1420
1421				port@2 {
1422					#address-cells = <1>;
1423					#size-cells = <0>;
1424
1425					reg = <2>;
1426
1427					vin08isp1: endpoint@1 {
1428						reg = <1>;
1429						remote-endpoint = <&isp1vin08>;
1430					};
1431				};
1432			};
1433		};
1434
1435		vin09: video@e6ef9000 {
1436			compatible = "renesas,vin-r8a779g0";
1437			reg = <0 0xe6ef9000 0 0x1000>;
1438			interrupts = <GIC_SPI 538 IRQ_TYPE_LEVEL_HIGH>;
1439			clocks = <&cpg CPG_MOD 807>;
1440			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1441			resets = <&cpg 807>;
1442			renesas,id = <9>;
1443			status = "disabled";
1444
1445			ports {
1446				#address-cells = <1>;
1447				#size-cells = <0>;
1448
1449				port@2 {
1450					#address-cells = <1>;
1451					#size-cells = <0>;
1452
1453					reg = <2>;
1454
1455					vin09isp1: endpoint@1 {
1456						reg = <1>;
1457						remote-endpoint = <&isp1vin09>;
1458					};
1459				};
1460			};
1461		};
1462
1463		vin10: video@e6efa000 {
1464			compatible = "renesas,vin-r8a779g0";
1465			reg = <0 0xe6efa000 0 0x1000>;
1466			interrupts = <GIC_SPI 539 IRQ_TYPE_LEVEL_HIGH>;
1467			clocks = <&cpg CPG_MOD 808>;
1468			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1469			resets = <&cpg 808>;
1470			renesas,id = <10>;
1471			status = "disabled";
1472
1473			ports {
1474				#address-cells = <1>;
1475				#size-cells = <0>;
1476
1477				port@2 {
1478					#address-cells = <1>;
1479					#size-cells = <0>;
1480
1481					reg = <2>;
1482
1483					vin10isp1: endpoint@1 {
1484						reg = <1>;
1485						remote-endpoint = <&isp1vin10>;
1486					};
1487				};
1488			};
1489		};
1490
1491		vin11: video@e6efb000 {
1492			compatible = "renesas,vin-r8a779g0";
1493			reg = <0 0xe6efb000 0 0x1000>;
1494			interrupts = <GIC_SPI 540 IRQ_TYPE_LEVEL_HIGH>;
1495			clocks = <&cpg CPG_MOD 809>;
1496			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1497			resets = <&cpg 809>;
1498			renesas,id = <11>;
1499			status = "disabled";
1500
1501			ports {
1502				#address-cells = <1>;
1503				#size-cells = <0>;
1504
1505				port@2 {
1506					#address-cells = <1>;
1507					#size-cells = <0>;
1508
1509					reg = <2>;
1510
1511					vin11isp1: endpoint@1 {
1512						reg = <1>;
1513						remote-endpoint = <&isp1vin11>;
1514					};
1515				};
1516			};
1517		};
1518
1519		vin12: video@e6efc000 {
1520			compatible = "renesas,vin-r8a779g0";
1521			reg = <0 0xe6efc000 0 0x1000>;
1522			interrupts = <GIC_SPI 541 IRQ_TYPE_LEVEL_HIGH>;
1523			clocks = <&cpg CPG_MOD 810>;
1524			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1525			resets = <&cpg 810>;
1526			renesas,id = <12>;
1527			status = "disabled";
1528
1529			ports {
1530				#address-cells = <1>;
1531				#size-cells = <0>;
1532
1533				port@2 {
1534					#address-cells = <1>;
1535					#size-cells = <0>;
1536
1537					reg = <2>;
1538
1539					vin12isp1: endpoint@1 {
1540						reg = <1>;
1541						remote-endpoint = <&isp1vin12>;
1542					};
1543				};
1544			};
1545		};
1546
1547		vin13: video@e6efd000 {
1548			compatible = "renesas,vin-r8a779g0";
1549			reg = <0 0xe6efd000 0 0x1000>;
1550			interrupts = <GIC_SPI 542 IRQ_TYPE_LEVEL_HIGH>;
1551			clocks = <&cpg CPG_MOD 811>;
1552			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1553			resets = <&cpg 811>;
1554			renesas,id = <13>;
1555			status = "disabled";
1556
1557			ports {
1558				#address-cells = <1>;
1559				#size-cells = <0>;
1560
1561				port@2 {
1562					#address-cells = <1>;
1563					#size-cells = <0>;
1564
1565					reg = <2>;
1566
1567					vin13isp1: endpoint@1 {
1568						reg = <1>;
1569						remote-endpoint = <&isp1vin13>;
1570					};
1571				};
1572			};
1573		};
1574
1575		vin14: video@e6efe000 {
1576			compatible = "renesas,vin-r8a779g0";
1577			reg = <0 0xe6efe000 0 0x1000>;
1578			interrupts = <GIC_SPI 543 IRQ_TYPE_LEVEL_HIGH>;
1579			clocks = <&cpg CPG_MOD 812>;
1580			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1581			resets = <&cpg 812>;
1582			renesas,id = <14>;
1583			status = "disabled";
1584
1585			ports {
1586				#address-cells = <1>;
1587				#size-cells = <0>;
1588
1589				port@2 {
1590					#address-cells = <1>;
1591					#size-cells = <0>;
1592
1593					reg = <2>;
1594
1595					vin14isp1: endpoint@1 {
1596						reg = <1>;
1597						remote-endpoint = <&isp1vin14>;
1598					};
1599				};
1600			};
1601		};
1602
1603		vin15: video@e6eff000 {
1604			compatible = "renesas,vin-r8a779g0";
1605			reg = <0 0xe6eff000 0 0x1000>;
1606			interrupts = <GIC_SPI 544 IRQ_TYPE_LEVEL_HIGH>;
1607			clocks = <&cpg CPG_MOD 813>;
1608			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1609			resets = <&cpg 813>;
1610			renesas,id = <15>;
1611			status = "disabled";
1612
1613			ports {
1614				#address-cells = <1>;
1615				#size-cells = <0>;
1616
1617				port@2 {
1618					#address-cells = <1>;
1619					#size-cells = <0>;
1620
1621					reg = <2>;
1622
1623					vin15isp1: endpoint@1 {
1624						reg = <1>;
1625						remote-endpoint = <&isp1vin15>;
1626					};
1627				};
1628			};
1629		};
1630
1631		dmac0: dma-controller@e7350000 {
1632			compatible = "renesas,dmac-r8a779g0",
1633				     "renesas,rcar-gen4-dmac";
1634			reg = <0 0xe7350000 0 0x1000>,
1635			      <0 0xe7300000 0 0x10000>;
1636			interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
1637				     <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
1638				     <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
1639				     <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
1640				     <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
1641				     <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
1642				     <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
1643				     <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
1644				     <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
1645				     <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
1646				     <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>,
1647				     <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
1648				     <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,
1649				     <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
1650				     <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
1651				     <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
1652				     <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
1653			interrupt-names = "error",
1654					  "ch0", "ch1", "ch2", "ch3", "ch4",
1655					  "ch5", "ch6", "ch7", "ch8", "ch9",
1656					  "ch10", "ch11", "ch12", "ch13",
1657					  "ch14", "ch15";
1658			clocks = <&cpg CPG_MOD 709>;
1659			clock-names = "fck";
1660			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1661			resets = <&cpg 709>;
1662			#dma-cells = <1>;
1663			dma-channels = <16>;
1664			iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
1665				 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
1666				 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
1667				 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
1668				 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
1669				 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
1670				 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
1671				 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
1672		};
1673
1674		dmac1: dma-controller@e7351000 {
1675			compatible = "renesas,dmac-r8a779g0",
1676				     "renesas,rcar-gen4-dmac";
1677			reg = <0 0xe7351000 0 0x1000>,
1678			      <0 0xe7310000 0 0x10000>;
1679			interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
1680				     <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
1681				     <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
1682				     <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
1683				     <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
1684				     <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
1685				     <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
1686				     <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
1687				     <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
1688				     <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
1689				     <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
1690				     <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
1691				     <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
1692				     <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
1693				     <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
1694				     <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
1695				     <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
1696			interrupt-names = "error",
1697					  "ch0", "ch1", "ch2", "ch3", "ch4",
1698					  "ch5", "ch6", "ch7", "ch8", "ch9",
1699					  "ch10", "ch11", "ch12", "ch13",
1700					  "ch14", "ch15";
1701			clocks = <&cpg CPG_MOD 710>;
1702			clock-names = "fck";
1703			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1704			resets = <&cpg 710>;
1705			#dma-cells = <1>;
1706			dma-channels = <16>;
1707			iommus = <&ipmmu_ds0 16>, <&ipmmu_ds0 17>,
1708				 <&ipmmu_ds0 18>, <&ipmmu_ds0 19>,
1709				 <&ipmmu_ds0 20>, <&ipmmu_ds0 21>,
1710				 <&ipmmu_ds0 22>, <&ipmmu_ds0 23>,
1711				 <&ipmmu_ds0 24>, <&ipmmu_ds0 25>,
1712				 <&ipmmu_ds0 26>, <&ipmmu_ds0 27>,
1713				 <&ipmmu_ds0 28>, <&ipmmu_ds0 29>,
1714				 <&ipmmu_ds0 30>, <&ipmmu_ds0 31>;
1715		};
1716
1717		rcar_sound: sound@ec5a0000 {
1718			/*
1719			 * #sound-dai-cells is required
1720			 *
1721			 * Single DAI : #sound-dai-cells = <0>;	<&rcar_sound>;
1722			 * Multi  DAI : #sound-dai-cells = <1>;	<&rcar_sound N>;
1723			 */
1724			/*
1725			 * #clock-cells is required
1726			 *
1727			 * clkout		: #clock-cells = <0>;	<&rcar_sound>;
1728			 * audio_clkout0/1/2/3	: #clock-cells = <1>;	<&rcar_sound N>;
1729			 */
1730			compatible = "renesas,rcar_sound-r8a779g0", "renesas,rcar_sound-gen4";
1731			reg = <0 0xec5a0000 0 0x020>,
1732			      <0 0xec540000 0 0x1000>,
1733			      <0 0xec541000 0 0x050>,
1734			      <0 0xec400000 0 0x40000>;
1735			reg-names = "adg", "ssiu", "ssi", "sdmc";
1736
1737			clocks = <&cpg CPG_MOD 2926>, <&cpg CPG_MOD 2927>, <&audio_clkin>;
1738			clock-names = "ssiu.0", "ssi.0", "clkin";
1739			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1740			resets = <&cpg 2926>, <&cpg 2927>;
1741			reset-names = "ssiu.0", "ssi.0";
1742			status = "disabled";
1743
1744			rcar_sound,ssiu {
1745				ssiu00: ssiu-0 {
1746					dmas = <&dmac0 0x6e>, <&dmac0 0x6f>;
1747					dma-names = "tx", "rx";
1748				};
1749				ssiu01: ssiu-1 {
1750					dmas = <&dmac0 0x6c>, <&dmac0 0x6d>;
1751					dma-names = "tx", "rx";
1752				};
1753				ssiu02: ssiu-2 {
1754					dmas = <&dmac0 0x6a>, <&dmac0 0x6b>;
1755					dma-names = "tx", "rx";
1756				};
1757				ssiu03: ssiu-3 {
1758					dmas = <&dmac0 0x68>, <&dmac0 0x69>;
1759					dma-names = "tx", "rx";
1760				};
1761				ssiu04: ssiu-4 {
1762					dmas = <&dmac0 0x66>, <&dmac0 0x67>;
1763					dma-names = "tx", "rx";
1764				};
1765				ssiu05: ssiu-5 {
1766					dmas = <&dmac0 0x64>, <&dmac0 0x65>;
1767					dma-names = "tx", "rx";
1768				};
1769				ssiu06: ssiu-6 {
1770					dmas = <&dmac0 0x62>, <&dmac0 0x63>;
1771					dma-names = "tx", "rx";
1772				};
1773				ssiu07: ssiu-7 {
1774					dmas = <&dmac0 0x60>, <&dmac0 0x61>;
1775					dma-names = "tx", "rx";
1776				};
1777			};
1778
1779			rcar_sound,ssi {
1780				ssi0: ssi-0 {
1781					interrupts = <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>;
1782				};
1783			};
1784		};
1785
1786		mmc0: mmc@ee140000 {
1787			compatible = "renesas,sdhi-r8a779g0",
1788				     "renesas,rcar-gen4-sdhi";
1789			reg = <0 0xee140000 0 0x2000>;
1790			interrupts = <GIC_SPI 440 IRQ_TYPE_LEVEL_HIGH>;
1791			clocks = <&cpg CPG_MOD 706>,
1792				 <&cpg CPG_CORE R8A779G0_CLK_SD0H>;
1793			clock-names = "core", "clkh";
1794			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1795			resets = <&cpg 706>;
1796			max-frequency = <200000000>;
1797			iommus = <&ipmmu_ds0 32>;
1798			status = "disabled";
1799		};
1800
1801		rpc: spi@ee200000 {
1802			compatible = "renesas,r8a779g0-rpc-if",
1803				     "renesas,rcar-gen4-rpc-if";
1804			reg = <0 0xee200000 0 0x200>,
1805			      <0 0x08000000 0 0x04000000>,
1806			      <0 0xee208000 0 0x100>;
1807			reg-names = "regs", "dirmap", "wbuf";
1808			interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
1809			clocks = <&cpg CPG_MOD 629>;
1810			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1811			resets = <&cpg 629>;
1812			#address-cells = <1>;
1813			#size-cells = <0>;
1814			status = "disabled";
1815		};
1816
1817		ipmmu_rt0: iommu@ee480000 {
1818			compatible = "renesas,ipmmu-r8a779g0",
1819				     "renesas,rcar-gen4-ipmmu-vmsa";
1820			reg = <0 0xee480000 0 0x20000>;
1821			renesas,ipmmu-main = <&ipmmu_mm>;
1822			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1823			#iommu-cells = <1>;
1824		};
1825
1826		ipmmu_rt1: iommu@ee4c0000 {
1827			compatible = "renesas,ipmmu-r8a779g0",
1828				     "renesas,rcar-gen4-ipmmu-vmsa";
1829			reg = <0 0xee4c0000 0 0x20000>;
1830			renesas,ipmmu-main = <&ipmmu_mm>;
1831			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1832			#iommu-cells = <1>;
1833		};
1834
1835		ipmmu_ds0: iommu@eed00000 {
1836			compatible = "renesas,ipmmu-r8a779g0",
1837				     "renesas,rcar-gen4-ipmmu-vmsa";
1838			reg = <0 0xeed00000 0 0x20000>;
1839			renesas,ipmmu-main = <&ipmmu_mm>;
1840			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1841			#iommu-cells = <1>;
1842		};
1843
1844		ipmmu_hc: iommu@eed40000 {
1845			compatible = "renesas,ipmmu-r8a779g0",
1846				     "renesas,rcar-gen4-ipmmu-vmsa";
1847			reg = <0 0xeed40000 0 0x20000>;
1848			renesas,ipmmu-main = <&ipmmu_mm>;
1849			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1850			#iommu-cells = <1>;
1851		};
1852
1853		ipmmu_ir: iommu@eed80000 {
1854			compatible = "renesas,ipmmu-r8a779g0",
1855				     "renesas,rcar-gen4-ipmmu-vmsa";
1856			reg = <0 0xeed80000 0 0x20000>;
1857			renesas,ipmmu-main = <&ipmmu_mm>;
1858			power-domains = <&sysc R8A779G0_PD_A3IR>;
1859			#iommu-cells = <1>;
1860		};
1861
1862		ipmmu_vc: iommu@eedc0000 {
1863			compatible = "renesas,ipmmu-r8a779g0",
1864				     "renesas,rcar-gen4-ipmmu-vmsa";
1865			reg = <0 0xeedc0000 0 0x20000>;
1866			renesas,ipmmu-main = <&ipmmu_mm>;
1867			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1868			#iommu-cells = <1>;
1869		};
1870
1871		ipmmu_3dg: iommu@eee00000 {
1872			compatible = "renesas,ipmmu-r8a779g0",
1873				     "renesas,rcar-gen4-ipmmu-vmsa";
1874			reg = <0 0xeee00000 0 0x20000>;
1875			renesas,ipmmu-main = <&ipmmu_mm>;
1876			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1877			#iommu-cells = <1>;
1878		};
1879
1880		ipmmu_vi0: iommu@eee80000 {
1881			compatible = "renesas,ipmmu-r8a779g0",
1882				     "renesas,rcar-gen4-ipmmu-vmsa";
1883			reg = <0 0xeee80000 0 0x20000>;
1884			renesas,ipmmu-main = <&ipmmu_mm>;
1885			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1886			#iommu-cells = <1>;
1887		};
1888
1889		ipmmu_vi1: iommu@eeec0000 {
1890			compatible = "renesas,ipmmu-r8a779g0",
1891				     "renesas,rcar-gen4-ipmmu-vmsa";
1892			reg = <0 0xeeec0000 0 0x20000>;
1893			renesas,ipmmu-main = <&ipmmu_mm>;
1894			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1895			#iommu-cells = <1>;
1896		};
1897
1898		ipmmu_vip0: iommu@eef00000 {
1899			compatible = "renesas,ipmmu-r8a779g0",
1900				     "renesas,rcar-gen4-ipmmu-vmsa";
1901			reg = <0 0xeef00000 0 0x20000>;
1902			renesas,ipmmu-main = <&ipmmu_mm>;
1903			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1904			#iommu-cells = <1>;
1905		};
1906
1907		ipmmu_vip1: iommu@eef40000 {
1908			compatible = "renesas,ipmmu-r8a779g0",
1909				     "renesas,rcar-gen4-ipmmu-vmsa";
1910			reg = <0 0xeef40000 0 0x20000>;
1911			renesas,ipmmu-main = <&ipmmu_mm>;
1912			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1913			#iommu-cells = <1>;
1914		};
1915
1916		ipmmu_mm: iommu@eefc0000 {
1917			compatible = "renesas,ipmmu-r8a779g0",
1918				     "renesas,rcar-gen4-ipmmu-vmsa";
1919			reg = <0 0xeefc0000 0 0x20000>;
1920			interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
1921				     <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>;
1922			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1923			#iommu-cells = <1>;
1924		};
1925
1926		gic: interrupt-controller@f1000000 {
1927			compatible = "arm,gic-v3";
1928			#interrupt-cells = <3>;
1929			#address-cells = <0>;
1930			interrupt-controller;
1931			reg = <0x0 0xf1000000 0 0x20000>,
1932			      <0x0 0xf1060000 0 0x110000>;
1933			interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
1934		};
1935
1936		csi40: csi2@fe500000 {
1937			compatible = "renesas,r8a779g0-csi2";
1938			reg = <0 0xfe500000 0 0x40000>;
1939			interrupts = <GIC_SPI 499 IRQ_TYPE_LEVEL_HIGH>;
1940			clocks = <&cpg CPG_MOD 331>;
1941			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1942			resets = <&cpg 331>;
1943			status = "disabled";
1944
1945			ports {
1946				#address-cells = <1>;
1947				#size-cells = <0>;
1948
1949				port@0 {
1950					reg = <0>;
1951				};
1952
1953				port@1 {
1954					reg = <1>;
1955					csi40isp0: endpoint {
1956						remote-endpoint = <&isp0csi40>;
1957					};
1958				};
1959			};
1960		};
1961
1962		csi41: csi2@fe540000 {
1963			compatible = "renesas,r8a779g0-csi2";
1964			reg = <0 0xfe540000 0 0x40000>;
1965			interrupts = <GIC_SPI 500 IRQ_TYPE_LEVEL_HIGH>;
1966			clocks = <&cpg CPG_MOD 400>;
1967			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1968			resets = <&cpg 400>;
1969			status = "disabled";
1970
1971			ports {
1972				#address-cells = <1>;
1973				#size-cells = <0>;
1974
1975				port@0 {
1976					reg = <0>;
1977				};
1978
1979				port@1 {
1980					reg = <1>;
1981					csi41isp1: endpoint {
1982						remote-endpoint = <&isp1csi41>;
1983					};
1984				};
1985			};
1986		};
1987
1988		fcpvd0: fcp@fea10000 {
1989			compatible = "renesas,fcpv";
1990			reg = <0 0xfea10000 0 0x200>;
1991			clocks = <&cpg CPG_MOD 508>;
1992			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
1993			resets = <&cpg 508>;
1994		};
1995
1996		fcpvd1: fcp@fea11000 {
1997			compatible = "renesas,fcpv";
1998			reg = <0 0xfea11000 0 0x200>;
1999			clocks = <&cpg CPG_MOD 509>;
2000			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
2001			resets = <&cpg 509>;
2002		};
2003
2004		vspd0: vsp@fea20000 {
2005			compatible = "renesas,vsp2";
2006			reg = <0 0xfea20000 0 0x7000>;
2007			interrupts = <GIC_SPI 546 IRQ_TYPE_LEVEL_HIGH>;
2008			clocks = <&cpg CPG_MOD 830>;
2009			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
2010			resets = <&cpg 830>;
2011
2012			renesas,fcp = <&fcpvd0>;
2013		};
2014
2015		vspd1: vsp@fea28000 {
2016			compatible = "renesas,vsp2";
2017			reg = <0 0xfea28000 0 0x7000>;
2018			interrupts = <GIC_SPI 551 IRQ_TYPE_LEVEL_HIGH>;
2019			clocks = <&cpg CPG_MOD 831>;
2020			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
2021			resets = <&cpg 831>;
2022
2023			renesas,fcp = <&fcpvd1>;
2024		};
2025
2026		du: display@feb00000 {
2027			compatible = "renesas,du-r8a779g0";
2028			reg = <0 0xfeb00000 0 0x40000>;
2029			interrupts = <GIC_SPI 523 IRQ_TYPE_LEVEL_HIGH>,
2030				     <GIC_SPI 524 IRQ_TYPE_LEVEL_HIGH>;
2031			clocks = <&cpg CPG_MOD 411>;
2032			clock-names = "du.0";
2033			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
2034			resets = <&cpg 411>;
2035			reset-names = "du.0";
2036			renesas,vsps = <&vspd0 0>, <&vspd1 0>;
2037
2038			status = "disabled";
2039
2040			ports {
2041				#address-cells = <1>;
2042				#size-cells = <0>;
2043
2044				port@0 {
2045					reg = <0>;
2046					du_out_dsi0: endpoint {
2047						remote-endpoint = <&dsi0_in>;
2048					};
2049				};
2050
2051				port@1 {
2052					reg = <1>;
2053					du_out_dsi1: endpoint {
2054						remote-endpoint = <&dsi1_in>;
2055					};
2056				};
2057			};
2058		};
2059
2060		isp0: isp@fed00000 {
2061			compatible = "renesas,r8a779g0-isp";
2062			reg = <0 0xfed00000 0 0x10000>;
2063			interrupts = <GIC_SPI 473 IRQ_TYPE_LEVEL_LOW>;
2064			clocks = <&cpg CPG_MOD 612>;
2065			power-domains = <&sysc R8A779G0_PD_A3ISP0>;
2066			resets = <&cpg 612>;
2067			status = "disabled";
2068
2069			ports {
2070				#address-cells = <1>;
2071				#size-cells = <0>;
2072
2073				port@0 {
2074					#address-cells = <1>;
2075					#size-cells = <0>;
2076
2077					reg = <0>;
2078
2079					isp0csi40: endpoint@0 {
2080						reg = <0>;
2081						remote-endpoint = <&csi40isp0>;
2082					};
2083				};
2084
2085				port@1 {
2086					reg = <1>;
2087					isp0vin00: endpoint {
2088						remote-endpoint = <&vin00isp0>;
2089					};
2090				};
2091
2092				port@2 {
2093					reg = <2>;
2094					isp0vin01: endpoint {
2095						remote-endpoint = <&vin01isp0>;
2096					};
2097				};
2098
2099				port@3 {
2100					reg = <3>;
2101					isp0vin02: endpoint {
2102						remote-endpoint = <&vin02isp0>;
2103					};
2104				};
2105
2106				port@4 {
2107					reg = <4>;
2108					isp0vin03: endpoint {
2109						remote-endpoint = <&vin03isp0>;
2110					};
2111				};
2112
2113				port@5 {
2114					reg = <5>;
2115					isp0vin04: endpoint {
2116						remote-endpoint = <&vin04isp0>;
2117					};
2118				};
2119
2120				port@6 {
2121					reg = <6>;
2122					isp0vin05: endpoint {
2123						remote-endpoint = <&vin05isp0>;
2124					};
2125				};
2126
2127				port@7 {
2128					reg = <7>;
2129					isp0vin06: endpoint {
2130						remote-endpoint = <&vin06isp0>;
2131					};
2132				};
2133
2134				port@8 {
2135					reg = <8>;
2136					isp0vin07: endpoint {
2137						remote-endpoint = <&vin07isp0>;
2138					};
2139				};
2140			};
2141		};
2142
2143		isp1: isp@fed20000 {
2144			compatible = "renesas,r8a779g0-isp";
2145			reg = <0 0xfed20000 0 0x10000>;
2146			interrupts = <GIC_SPI 474 IRQ_TYPE_LEVEL_LOW>;
2147			clocks = <&cpg CPG_MOD 613>;
2148			power-domains = <&sysc R8A779G0_PD_A3ISP1>;
2149			resets = <&cpg 613>;
2150			status = "disabled";
2151
2152			ports {
2153				#address-cells = <1>;
2154				#size-cells = <0>;
2155
2156				port@0 {
2157					#address-cells = <1>;
2158					#size-cells = <0>;
2159
2160					reg = <0>;
2161
2162					isp1csi41: endpoint@1 {
2163						reg = <1>;
2164						remote-endpoint = <&csi41isp1>;
2165					};
2166				};
2167
2168				port@1 {
2169					reg = <1>;
2170					isp1vin08: endpoint {
2171						remote-endpoint = <&vin08isp1>;
2172					};
2173				};
2174
2175				port@2 {
2176					reg = <2>;
2177					isp1vin09: endpoint {
2178						remote-endpoint = <&vin09isp1>;
2179					};
2180				};
2181
2182				port@3 {
2183					reg = <3>;
2184					isp1vin10: endpoint {
2185						remote-endpoint = <&vin10isp1>;
2186					};
2187				};
2188
2189				port@4 {
2190					reg = <4>;
2191					isp1vin11: endpoint {
2192						remote-endpoint = <&vin11isp1>;
2193					};
2194				};
2195
2196				port@5 {
2197					reg = <5>;
2198					isp1vin12: endpoint {
2199						remote-endpoint = <&vin12isp1>;
2200					};
2201				};
2202
2203				port@6 {
2204					reg = <6>;
2205					isp1vin13: endpoint {
2206						remote-endpoint = <&vin13isp1>;
2207					};
2208				};
2209
2210				port@7 {
2211					reg = <7>;
2212					isp1vin14: endpoint {
2213						remote-endpoint = <&vin14isp1>;
2214					};
2215				};
2216
2217				port@8 {
2218					reg = <8>;
2219					isp1vin15: endpoint {
2220						remote-endpoint = <&vin15isp1>;
2221					};
2222				};
2223			};
2224		};
2225
2226		dsi0: dsi-encoder@fed80000 {
2227			compatible = "renesas,r8a779g0-dsi-csi2-tx";
2228			reg = <0 0xfed80000 0 0x10000>;
2229			clocks = <&cpg CPG_MOD 415>,
2230				 <&cpg CPG_CORE R8A779G0_CLK_DSIEXT>,
2231				 <&cpg CPG_CORE R8A779G0_CLK_DSIREF>;
2232			clock-names = "fck", "dsi", "pll";
2233			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
2234			resets = <&cpg 415>;
2235
2236			status = "disabled";
2237
2238			ports {
2239				#address-cells = <1>;
2240				#size-cells = <0>;
2241
2242				port@0 {
2243					reg = <0>;
2244					dsi0_in: endpoint {
2245						remote-endpoint = <&du_out_dsi0>;
2246					};
2247				};
2248
2249				port@1 {
2250					reg = <1>;
2251				};
2252			};
2253		};
2254
2255		dsi1: dsi-encoder@fed90000 {
2256			compatible = "renesas,r8a779g0-dsi-csi2-tx";
2257			reg = <0 0xfed90000 0 0x10000>;
2258			clocks = <&cpg CPG_MOD 416>,
2259				 <&cpg CPG_CORE R8A779G0_CLK_DSIEXT>,
2260				 <&cpg CPG_CORE R8A779G0_CLK_DSIREF>;
2261			clock-names = "fck", "dsi", "pll";
2262			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
2263			resets = <&cpg 416>;
2264
2265			status = "disabled";
2266
2267			ports {
2268				#address-cells = <1>;
2269				#size-cells = <0>;
2270
2271				port@0 {
2272					reg = <0>;
2273					dsi1_in: endpoint {
2274						remote-endpoint = <&du_out_dsi1>;
2275					};
2276				};
2277
2278				port@1 {
2279					reg = <1>;
2280				};
2281			};
2282		};
2283
2284		prr: chipid@fff00044 {
2285			compatible = "renesas,prr";
2286			reg = <0 0xfff00044 0 4>;
2287		};
2288	};
2289
2290	thermal-zones {
2291		sensor_thermal_cr52: sensor1-thermal {
2292			polling-delay-passive = <250>;
2293			polling-delay = <1000>;
2294			thermal-sensors = <&tsc 0>;
2295
2296			trips {
2297				sensor1_crit: sensor1-crit {
2298					temperature = <120000>;
2299					hysteresis = <1000>;
2300					type = "critical";
2301				};
2302			};
2303		};
2304
2305		sensor_thermal_cnn: sensor2-thermal {
2306			polling-delay-passive = <250>;
2307			polling-delay = <1000>;
2308			thermal-sensors = <&tsc 1>;
2309
2310			trips {
2311				sensor2_crit: sensor2-crit {
2312					temperature = <120000>;
2313					hysteresis = <1000>;
2314					type = "critical";
2315				};
2316			};
2317		};
2318
2319		sensor_thermal_ca76: sensor3-thermal {
2320			polling-delay-passive = <250>;
2321			polling-delay = <1000>;
2322			thermal-sensors = <&tsc 2>;
2323
2324			trips {
2325				sensor3_crit: sensor3-crit {
2326					temperature = <120000>;
2327					hysteresis = <1000>;
2328					type = "critical";
2329				};
2330			};
2331		};
2332
2333		sensor_thermal_ddr1: sensor4-thermal {
2334			polling-delay-passive = <250>;
2335			polling-delay = <1000>;
2336			thermal-sensors = <&tsc 3>;
2337
2338			trips {
2339				sensor4_crit: sensor4-crit {
2340					temperature = <120000>;
2341					hysteresis = <1000>;
2342					type = "critical";
2343				};
2344			};
2345		};
2346	};
2347
2348	timer {
2349		compatible = "arm,armv8-timer";
2350		interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
2351				      <&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
2352				      <&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
2353				      <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>,
2354				      <&gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>;
2355		interrupt-names = "sec-phys", "phys", "virt", "hyp-phys",
2356				  "hyp-virt";
2357	};
2358};
2359