| /openbmc/u-boot/drivers/reset/ |
| H A D | sti-reset.c | 79 #define STIH407_SRST_CORE(_reg, _bit) \ argument
82 #define STIH407_SRST_SBC(_reg, _bit) \ argument
85 #define STIH407_SRST_LPM(_reg, _bit) \ argument
88 #define STIH407_PDN_0(_bit) \ argument
90 #define STIH407_PDN_1(_bit) \ argument
92 #define STIH407_PDN_ETH(_bit, _stat) \ argument
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| H A D | reset-uniphier.c | 27 #define UNIPHIER_RESET(_id, _reg, _bit) \ argument
34 #define UNIPHIER_RESETX(_id, _reg, _bit) \ argument
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| /openbmc/u-boot/arch/arm/include/asm/arch-sunxi/ |
| H A D | ccu.h | 33 #define GATE(_off, _bit) { \ argument
51 #define RESET(_off, _bit) { \ argument
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| /openbmc/u-boot/drivers/clk/uniphier/ |
| H A D | clk-uniphier.h | 59 #define UNIPHIER_CLK_GATE(_id, _parent, _reg, _bit) \ argument
70 #define UNIPHIER_CLK_GATE_SIMPLE(_id, _reg, _bit) \ argument
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| /openbmc/u-boot/drivers/clk/ |
| H A D | clk_meson.h | 18 #define MESON_GATE(id, _reg, _bit) \ argument
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| /openbmc/qemu/include/hw/ |
| H A D | qdev-properties.h | 94 #define DEFINE_PROP_BIT(_name, _state, _field, _bit, _defval) \ argument
108 #define DEFINE_PROP_BIT64(_name, _state, _field, _bit, _defval) \ argument
114 #define DEFINE_PROP_ON_OFF_AUTO_BIT64(_name, _state, _field, _bit, _defval) \ argument
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| /openbmc/u-boot/arch/arm/cpu/armv7/bcm235xx/ |
| H A D | clk-core.h | 382 #define TRIGGER(_offset, _bit) \ argument
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| /openbmc/u-boot/arch/arm/cpu/armv7/bcm281xx/ |
| H A D | clk-core.h | 382 #define TRIGGER(_offset, _bit) \ argument
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| /openbmc/qemu/target/riscv/tcg/ |
| H A D | tcg-cpu.c | 1365 #define MISA_CFG(_bit, _enabled) \ argument
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| /openbmc/qemu/target/riscv/ |
| H A D | cpu.c | 1154 #define MISA_INFO_IDX(_bit) \ argument
1157 #define MISA_EXT_INFO(_bit, _propname, _descr) \ argument
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| /openbmc/qemu/target/riscv/kvm/ |
| H A D | kvm-cpu.c | 143 #define KVM_MISA_CFG(_bit, _reg_id) \ argument
|