1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Marvell RVU Admin Function driver 3 * 4 * Copyright (C) 2018 Marvell. 5 * 6 */ 7 8 #ifndef NPC_H 9 #define NPC_H 10 11 #define NPC_KEX_CHAN_MASK 0xFFFULL 12 13 #define SET_KEX_LD(intf, lid, ltype, ld, cfg) \ 14 rvu_write64(rvu, blkaddr, \ 15 NPC_AF_INTFX_LIDX_LTX_LDX_CFG(intf, lid, ltype, ld), cfg) 16 17 #define SET_KEX_LDFLAGS(intf, ld, flags, cfg) \ 18 rvu_write64(rvu, blkaddr, \ 19 NPC_AF_INTFX_LDATAX_FLAGSX_CFG(intf, ld, flags), cfg) 20 21 enum NPC_LID_E { 22 NPC_LID_LA = 0, 23 NPC_LID_LB, 24 NPC_LID_LC, 25 NPC_LID_LD, 26 NPC_LID_LE, 27 NPC_LID_LF, 28 NPC_LID_LG, 29 NPC_LID_LH, 30 }; 31 32 #define NPC_LT_NA 0 33 34 enum npc_kpu_la_ltype { 35 NPC_LT_LA_8023 = 1, 36 NPC_LT_LA_ETHER, 37 NPC_LT_LA_IH_NIX_ETHER, 38 NPC_LT_LA_HIGIG2_ETHER = 7, 39 NPC_LT_LA_IH_NIX_HIGIG2_ETHER, 40 NPC_LT_LA_CUSTOM_L2_90B_ETHER, 41 NPC_LT_LA_CPT_HDR, 42 NPC_LT_LA_CUSTOM_L2_24B_ETHER, 43 NPC_LT_LA_CUSTOM_PRE_L2_ETHER, 44 NPC_LT_LA_CUSTOM0 = 0xE, 45 NPC_LT_LA_CUSTOM1 = 0xF, 46 }; 47 48 enum npc_kpu_lb_ltype { 49 NPC_LT_LB_ETAG = 1, 50 NPC_LT_LB_CTAG, 51 NPC_LT_LB_STAG_QINQ, 52 NPC_LT_LB_BTAG, 53 NPC_LT_LB_PPPOE, 54 NPC_LT_LB_DSA, 55 NPC_LT_LB_DSA_VLAN, 56 NPC_LT_LB_EDSA, 57 NPC_LT_LB_EDSA_VLAN, 58 NPC_LT_LB_EXDSA, 59 NPC_LT_LB_EXDSA_VLAN, 60 NPC_LT_LB_FDSA, 61 NPC_LT_LB_VLAN_EXDSA, 62 NPC_LT_LB_CUSTOM0 = 0xE, 63 NPC_LT_LB_CUSTOM1 = 0xF, 64 }; 65 66 /* Don't modify ltypes up to IP6_EXT, otherwise length and checksum of IP 67 * headers may not be checked correctly. IPv4 ltypes and IPv6 ltypes must 68 * differ only at bit 0 so mask 0xE can be used to detect extended headers. 69 */ 70 enum npc_kpu_lc_ltype { 71 NPC_LT_LC_PTP = 1, 72 NPC_LT_LC_IP, 73 NPC_LT_LC_IP_OPT, 74 NPC_LT_LC_IP6, 75 NPC_LT_LC_IP6_EXT, 76 NPC_LT_LC_ARP, 77 NPC_LT_LC_RARP, 78 NPC_LT_LC_MPLS, 79 NPC_LT_LC_NSH, 80 NPC_LT_LC_FCOE, 81 NPC_LT_LC_NGIO, 82 NPC_LT_LC_CUSTOM0 = 0xE, 83 NPC_LT_LC_CUSTOM1 = 0xF, 84 }; 85 86 /* Don't modify Ltypes upto SCTP, otherwise it will 87 * effect flow tag calculation and thus RSS. 88 */ 89 enum npc_kpu_ld_ltype { 90 NPC_LT_LD_TCP = 1, 91 NPC_LT_LD_UDP, 92 NPC_LT_LD_ICMP, 93 NPC_LT_LD_SCTP, 94 NPC_LT_LD_ICMP6, 95 NPC_LT_LD_CUSTOM0, 96 NPC_LT_LD_CUSTOM1, 97 NPC_LT_LD_IGMP = 8, 98 NPC_LT_LD_AH, 99 NPC_LT_LD_GRE, 100 NPC_LT_LD_NVGRE, 101 NPC_LT_LD_NSH, 102 NPC_LT_LD_TU_MPLS_IN_NSH, 103 NPC_LT_LD_TU_MPLS_IN_IP, 104 }; 105 106 enum npc_kpu_le_ltype { 107 NPC_LT_LE_VXLAN = 1, 108 NPC_LT_LE_GENEVE, 109 NPC_LT_LE_ESP, 110 NPC_LT_LE_GTPU = 4, 111 NPC_LT_LE_VXLANGPE, 112 NPC_LT_LE_GTPC, 113 NPC_LT_LE_NSH, 114 NPC_LT_LE_TU_MPLS_IN_GRE, 115 NPC_LT_LE_TU_NSH_IN_GRE, 116 NPC_LT_LE_TU_MPLS_IN_UDP, 117 NPC_LT_LE_CUSTOM0 = 0xE, 118 NPC_LT_LE_CUSTOM1 = 0xF, 119 }; 120 121 enum npc_kpu_lf_ltype { 122 NPC_LT_LF_TU_ETHER = 1, 123 NPC_LT_LF_TU_PPP, 124 NPC_LT_LF_TU_MPLS_IN_VXLANGPE, 125 NPC_LT_LF_TU_NSH_IN_VXLANGPE, 126 NPC_LT_LF_TU_MPLS_IN_NSH, 127 NPC_LT_LF_TU_3RD_NSH, 128 NPC_LT_LF_CUSTOM0 = 0xE, 129 NPC_LT_LF_CUSTOM1 = 0xF, 130 }; 131 132 enum npc_kpu_lg_ltype { 133 NPC_LT_LG_TU_IP = 1, 134 NPC_LT_LG_TU_IP6, 135 NPC_LT_LG_TU_ARP, 136 NPC_LT_LG_TU_ETHER_IN_NSH, 137 NPC_LT_LG_CUSTOM0 = 0xE, 138 NPC_LT_LG_CUSTOM1 = 0xF, 139 }; 140 141 /* Don't modify Ltypes upto SCTP, otherwise it will 142 * effect flow tag calculation and thus RSS. 143 */ 144 enum npc_kpu_lh_ltype { 145 NPC_LT_LH_TU_TCP = 1, 146 NPC_LT_LH_TU_UDP, 147 NPC_LT_LH_TU_ICMP, 148 NPC_LT_LH_TU_SCTP, 149 NPC_LT_LH_TU_ICMP6, 150 NPC_LT_LH_TU_IGMP = 8, 151 NPC_LT_LH_TU_ESP, 152 NPC_LT_LH_TU_AH, 153 NPC_LT_LH_CUSTOM0 = 0xE, 154 NPC_LT_LH_CUSTOM1 = 0xF, 155 }; 156 157 /* NPC port kind defines how the incoming or outgoing packets 158 * are processed. NPC accepts packets from up to 64 pkinds. 159 * Software assigns pkind for each incoming port such as CGX 160 * Ethernet interfaces, LBK interfaces, etc. 161 */ 162 #define NPC_UNRESERVED_PKIND_COUNT NPC_RX_CUSTOM_PRE_L2_PKIND 163 164 enum npc_pkind_type { 165 NPC_RX_LBK_PKIND = 0ULL, 166 NPC_RX_CUSTOM_PRE_L2_PKIND = 55ULL, 167 NPC_RX_VLAN_EXDSA_PKIND = 56ULL, 168 NPC_RX_CHLEN24B_PKIND = 57ULL, 169 NPC_RX_CPT_HDR_PKIND, 170 NPC_RX_CHLEN90B_PKIND, 171 NPC_TX_HIGIG_PKIND, 172 NPC_RX_HIGIG_PKIND, 173 NPC_RX_EDSA_PKIND, 174 NPC_TX_DEF_PKIND, /* NIX-TX PKIND */ 175 }; 176 177 enum npc_interface_type { 178 NPC_INTF_MODE_DEF, 179 }; 180 181 /* list of known and supported fields in packet header and 182 * fields present in key structure. 183 */ 184 enum key_fields { 185 NPC_DMAC, 186 NPC_SMAC, 187 NPC_ETYPE, 188 NPC_VLAN_ETYPE_CTAG, /* 0x8100 */ 189 NPC_VLAN_ETYPE_STAG, /* 0x88A8 */ 190 NPC_OUTER_VID, 191 NPC_INNER_VID, 192 NPC_TOS, 193 NPC_IPFRAG_IPV4, 194 NPC_SIP_IPV4, 195 NPC_DIP_IPV4, 196 NPC_IPFRAG_IPV6, 197 NPC_SIP_IPV6, 198 NPC_DIP_IPV6, 199 NPC_IPPROTO_TCP, 200 NPC_IPPROTO_UDP, 201 NPC_IPPROTO_SCTP, 202 NPC_IPPROTO_AH, 203 NPC_IPPROTO_ESP, 204 NPC_IPPROTO_ICMP, 205 NPC_IPPROTO_ICMP6, 206 NPC_SPORT_TCP, 207 NPC_DPORT_TCP, 208 NPC_SPORT_UDP, 209 NPC_DPORT_UDP, 210 NPC_SPORT_SCTP, 211 NPC_DPORT_SCTP, 212 NPC_IPSEC_SPI, 213 NPC_HEADER_FIELDS_MAX, 214 NPC_CHAN = NPC_HEADER_FIELDS_MAX, /* Valid when Rx */ 215 NPC_PF_FUNC, /* Valid when Tx */ 216 NPC_ERRLEV, 217 NPC_ERRCODE, 218 NPC_LXMB, 219 NPC_EXACT_RESULT, 220 NPC_LA, 221 NPC_LB, 222 NPC_LC, 223 NPC_LD, 224 NPC_LE, 225 NPC_LF, 226 NPC_LG, 227 NPC_LH, 228 /* Ethertype for untagged frame */ 229 NPC_ETYPE_ETHER, 230 /* Ethertype for single tagged frame */ 231 NPC_ETYPE_TAG1, 232 /* Ethertype for double tagged frame */ 233 NPC_ETYPE_TAG2, 234 /* outer vlan tci for single tagged frame */ 235 NPC_VLAN_TAG1, 236 /* outer vlan tci for double tagged frame */ 237 NPC_VLAN_TAG2, 238 /* inner vlan tci for double tagged frame */ 239 NPC_VLAN_TAG3, 240 /* other header fields programmed to extract but not of our interest */ 241 NPC_UNKNOWN, 242 NPC_KEY_FIELDS_MAX, 243 }; 244 245 struct npc_kpu_profile_cam { 246 u8 state; 247 u8 state_mask; 248 u16 dp0; 249 u16 dp0_mask; 250 u16 dp1; 251 u16 dp1_mask; 252 u16 dp2; 253 u16 dp2_mask; 254 } __packed; 255 256 struct npc_kpu_profile_action { 257 u8 errlev; 258 u8 errcode; 259 u8 dp0_offset; 260 u8 dp1_offset; 261 u8 dp2_offset; 262 u8 bypass_count; 263 u8 parse_done; 264 u8 next_state; 265 u8 ptr_advance; 266 u8 cap_ena; 267 u8 lid; 268 u8 ltype; 269 u8 flags; 270 u8 offset; 271 u8 mask; 272 u8 right; 273 u8 shift; 274 } __packed; 275 276 struct npc_kpu_profile { 277 int cam_entries; 278 int action_entries; 279 struct npc_kpu_profile_cam *cam; 280 struct npc_kpu_profile_action *action; 281 }; 282 283 /* NPC KPU register formats */ 284 struct npc_kpu_cam { 285 #if defined(__BIG_ENDIAN_BITFIELD) 286 u64 rsvd_63_56 : 8; 287 u64 state : 8; 288 u64 dp2_data : 16; 289 u64 dp1_data : 16; 290 u64 dp0_data : 16; 291 #else 292 u64 dp0_data : 16; 293 u64 dp1_data : 16; 294 u64 dp2_data : 16; 295 u64 state : 8; 296 u64 rsvd_63_56 : 8; 297 #endif 298 }; 299 300 struct npc_kpu_action0 { 301 #if defined(__BIG_ENDIAN_BITFIELD) 302 u64 rsvd_63_57 : 7; 303 u64 byp_count : 3; 304 u64 capture_ena : 1; 305 u64 parse_done : 1; 306 u64 next_state : 8; 307 u64 rsvd_43 : 1; 308 u64 capture_lid : 3; 309 u64 capture_ltype : 4; 310 u64 capture_flags : 8; 311 u64 ptr_advance : 8; 312 u64 var_len_offset : 8; 313 u64 var_len_mask : 8; 314 u64 var_len_right : 1; 315 u64 var_len_shift : 3; 316 #else 317 u64 var_len_shift : 3; 318 u64 var_len_right : 1; 319 u64 var_len_mask : 8; 320 u64 var_len_offset : 8; 321 u64 ptr_advance : 8; 322 u64 capture_flags : 8; 323 u64 capture_ltype : 4; 324 u64 capture_lid : 3; 325 u64 rsvd_43 : 1; 326 u64 next_state : 8; 327 u64 parse_done : 1; 328 u64 capture_ena : 1; 329 u64 byp_count : 3; 330 u64 rsvd_63_57 : 7; 331 #endif 332 }; 333 334 struct npc_kpu_action1 { 335 #if defined(__BIG_ENDIAN_BITFIELD) 336 u64 rsvd_63_36 : 28; 337 u64 errlev : 4; 338 u64 errcode : 8; 339 u64 dp2_offset : 8; 340 u64 dp1_offset : 8; 341 u64 dp0_offset : 8; 342 #else 343 u64 dp0_offset : 8; 344 u64 dp1_offset : 8; 345 u64 dp2_offset : 8; 346 u64 errcode : 8; 347 u64 errlev : 4; 348 u64 rsvd_63_36 : 28; 349 #endif 350 }; 351 352 struct npc_kpu_pkind_cpi_def { 353 #if defined(__BIG_ENDIAN_BITFIELD) 354 u64 ena : 1; 355 u64 rsvd_62_59 : 4; 356 u64 lid : 3; 357 u64 ltype_match : 4; 358 u64 ltype_mask : 4; 359 u64 flags_match : 8; 360 u64 flags_mask : 8; 361 u64 add_offset : 8; 362 u64 add_mask : 8; 363 u64 rsvd_15 : 1; 364 u64 add_shift : 3; 365 u64 rsvd_11_10 : 2; 366 u64 cpi_base : 10; 367 #else 368 u64 cpi_base : 10; 369 u64 rsvd_11_10 : 2; 370 u64 add_shift : 3; 371 u64 rsvd_15 : 1; 372 u64 add_mask : 8; 373 u64 add_offset : 8; 374 u64 flags_mask : 8; 375 u64 flags_match : 8; 376 u64 ltype_mask : 4; 377 u64 ltype_match : 4; 378 u64 lid : 3; 379 u64 rsvd_62_59 : 4; 380 u64 ena : 1; 381 #endif 382 }; 383 384 struct nix_rx_action { 385 #if defined(__BIG_ENDIAN_BITFIELD) 386 u64 rsvd_63_61 :3; 387 u64 flow_key_alg :5; 388 u64 match_id :16; 389 u64 index :20; 390 u64 pf_func :16; 391 u64 op :4; 392 #else 393 u64 op :4; 394 u64 pf_func :16; 395 u64 index :20; 396 u64 match_id :16; 397 u64 flow_key_alg :5; 398 u64 rsvd_63_61 :3; 399 #endif 400 }; 401 402 /* NPC_AF_INTFX_KEX_CFG field masks */ 403 #define NPC_EXACT_NIBBLE_START 40 404 #define NPC_EXACT_NIBBLE_END 43 405 #define NPC_EXACT_NIBBLE GENMASK_ULL(43, 40) 406 407 /* NPC_EXACT_KEX_S nibble definitions for each field */ 408 #define NPC_EXACT_NIBBLE_HIT BIT_ULL(40) 409 #define NPC_EXACT_NIBBLE_OPC BIT_ULL(40) 410 #define NPC_EXACT_NIBBLE_WAY BIT_ULL(40) 411 #define NPC_EXACT_NIBBLE_INDEX GENMASK_ULL(43, 41) 412 413 #define NPC_EXACT_RESULT_HIT BIT_ULL(0) 414 #define NPC_EXACT_RESULT_OPC GENMASK_ULL(2, 1) 415 #define NPC_EXACT_RESULT_WAY GENMASK_ULL(4, 3) 416 #define NPC_EXACT_RESULT_IDX GENMASK_ULL(15, 5) 417 418 /* NPC_AF_INTFX_KEX_CFG field masks */ 419 #define NPC_PARSE_NIBBLE GENMASK_ULL(30, 0) 420 421 /* NPC_PARSE_KEX_S nibble definitions for each field */ 422 #define NPC_PARSE_NIBBLE_CHAN GENMASK_ULL(2, 0) 423 #define NPC_PARSE_NIBBLE_ERRLEV BIT_ULL(3) 424 #define NPC_PARSE_NIBBLE_ERRCODE GENMASK_ULL(5, 4) 425 #define NPC_PARSE_NIBBLE_L2L3_BCAST BIT_ULL(6) 426 #define NPC_PARSE_NIBBLE_LA_FLAGS GENMASK_ULL(8, 7) 427 #define NPC_PARSE_NIBBLE_LA_LTYPE BIT_ULL(9) 428 #define NPC_PARSE_NIBBLE_LB_FLAGS GENMASK_ULL(11, 10) 429 #define NPC_PARSE_NIBBLE_LB_LTYPE BIT_ULL(12) 430 #define NPC_PARSE_NIBBLE_LC_FLAGS GENMASK_ULL(14, 13) 431 #define NPC_PARSE_NIBBLE_LC_LTYPE BIT_ULL(15) 432 #define NPC_PARSE_NIBBLE_LD_FLAGS GENMASK_ULL(17, 16) 433 #define NPC_PARSE_NIBBLE_LD_LTYPE BIT_ULL(18) 434 #define NPC_PARSE_NIBBLE_LE_FLAGS GENMASK_ULL(20, 19) 435 #define NPC_PARSE_NIBBLE_LE_LTYPE BIT_ULL(21) 436 #define NPC_PARSE_NIBBLE_LF_FLAGS GENMASK_ULL(23, 22) 437 #define NPC_PARSE_NIBBLE_LF_LTYPE BIT_ULL(24) 438 #define NPC_PARSE_NIBBLE_LG_FLAGS GENMASK_ULL(26, 25) 439 #define NPC_PARSE_NIBBLE_LG_LTYPE BIT_ULL(27) 440 #define NPC_PARSE_NIBBLE_LH_FLAGS GENMASK_ULL(29, 28) 441 #define NPC_PARSE_NIBBLE_LH_LTYPE BIT_ULL(30) 442 443 struct nix_tx_action { 444 #if defined(__BIG_ENDIAN_BITFIELD) 445 u64 rsvd_63_48 :16; 446 u64 match_id :16; 447 u64 index :20; 448 u64 rsvd_11_8 :8; 449 u64 op :4; 450 #else 451 u64 op :4; 452 u64 rsvd_11_8 :8; 453 u64 index :20; 454 u64 match_id :16; 455 u64 rsvd_63_48 :16; 456 #endif 457 }; 458 459 /* NIX Receive Vtag Action Structure */ 460 #define RX_VTAG0_VALID_BIT BIT_ULL(15) 461 #define RX_VTAG0_TYPE_MASK GENMASK_ULL(14, 12) 462 #define RX_VTAG0_LID_MASK GENMASK_ULL(10, 8) 463 #define RX_VTAG0_RELPTR_MASK GENMASK_ULL(7, 0) 464 #define RX_VTAG1_VALID_BIT BIT_ULL(47) 465 #define RX_VTAG1_TYPE_MASK GENMASK_ULL(46, 44) 466 #define RX_VTAG1_LID_MASK GENMASK_ULL(42, 40) 467 #define RX_VTAG1_RELPTR_MASK GENMASK_ULL(39, 32) 468 469 /* NIX Transmit Vtag Action Structure */ 470 #define TX_VTAG0_DEF_MASK GENMASK_ULL(25, 16) 471 #define TX_VTAG0_OP_MASK GENMASK_ULL(13, 12) 472 #define TX_VTAG0_LID_MASK GENMASK_ULL(10, 8) 473 #define TX_VTAG0_RELPTR_MASK GENMASK_ULL(7, 0) 474 #define TX_VTAG1_DEF_MASK GENMASK_ULL(57, 48) 475 #define TX_VTAG1_OP_MASK GENMASK_ULL(45, 44) 476 #define TX_VTAG1_LID_MASK GENMASK_ULL(42, 40) 477 #define TX_VTAG1_RELPTR_MASK GENMASK_ULL(39, 32) 478 479 /* NPC MCAM reserved entry index per nixlf */ 480 #define NIXLF_UCAST_ENTRY 0 481 #define NIXLF_BCAST_ENTRY 1 482 #define NIXLF_ALLMULTI_ENTRY 2 483 #define NIXLF_PROMISC_ENTRY 3 484 485 struct npc_coalesced_kpu_prfl { 486 #define NPC_SIGN 0x00666f727063706e 487 #define NPC_PRFL_NAME "npc_prfls_array" 488 #define NPC_NAME_LEN 32 489 __le64 signature; /* "npcprof\0" (8 bytes/ASCII characters) */ 490 u8 name[NPC_NAME_LEN]; /* KPU Profile name */ 491 u64 version; /* KPU firmware/profile version */ 492 u8 num_prfl; /* No of NPC profiles. */ 493 u16 prfl_sz[]; 494 }; 495 496 struct npc_mcam_kex { 497 /* MKEX Profle Header */ 498 u64 mkex_sign; /* "mcam-kex-profile" (8 bytes/ASCII characters) */ 499 u8 name[MKEX_NAME_LEN]; /* MKEX Profile name */ 500 u64 cpu_model; /* Format as profiled by CPU hardware */ 501 u64 kpu_version; /* KPU firmware/profile version */ 502 u64 reserved; /* Reserved for extension */ 503 504 /* MKEX Profle Data */ 505 u64 keyx_cfg[NPC_MAX_INTF]; /* NPC_AF_INTF(0..1)_KEX_CFG */ 506 /* NPC_AF_KEX_LDATA(0..1)_FLAGS_CFG */ 507 u64 kex_ld_flags[NPC_MAX_LD]; 508 /* NPC_AF_INTF(0..1)_LID(0..7)_LT(0..15)_LD(0..1)_CFG */ 509 u64 intf_lid_lt_ld[NPC_MAX_INTF][NPC_MAX_LID][NPC_MAX_LT][NPC_MAX_LD]; 510 /* NPC_AF_INTF(0..1)_LDATA(0..1)_FLAGS(0..15)_CFG */ 511 u64 intf_ld_flags[NPC_MAX_INTF][NPC_MAX_LD][NPC_MAX_LFL]; 512 } __packed; 513 514 struct npc_kpu_fwdata { 515 int entries; 516 /* What follows is: 517 * struct npc_kpu_profile_cam[entries]; 518 * struct npc_kpu_profile_action[entries]; 519 */ 520 u8 data[]; 521 } __packed; 522 523 struct npc_lt_def { 524 u8 ltype_mask; 525 u8 ltype_match; 526 u8 lid; 527 } __packed; 528 529 struct npc_lt_def_ipsec { 530 u8 ltype_mask; 531 u8 ltype_match; 532 u8 lid; 533 u8 spi_offset; 534 u8 spi_nz; 535 } __packed; 536 537 struct npc_lt_def_apad { 538 u8 ltype_mask; 539 u8 ltype_match; 540 u8 lid; 541 u8 valid; 542 } __packed; 543 544 struct npc_lt_def_color { 545 u8 ltype_mask; 546 u8 ltype_match; 547 u8 lid; 548 u8 noffset; 549 u8 offset; 550 } __packed; 551 552 struct npc_lt_def_et { 553 u8 ltype_mask; 554 u8 ltype_match; 555 u8 lid; 556 u8 valid; 557 u8 offset; 558 } __packed; 559 560 struct npc_lt_def_cfg { 561 struct npc_lt_def rx_ol2; 562 struct npc_lt_def rx_oip4; 563 struct npc_lt_def rx_iip4; 564 struct npc_lt_def rx_oip6; 565 struct npc_lt_def rx_iip6; 566 struct npc_lt_def rx_otcp; 567 struct npc_lt_def rx_itcp; 568 struct npc_lt_def rx_oudp; 569 struct npc_lt_def rx_iudp; 570 struct npc_lt_def rx_osctp; 571 struct npc_lt_def rx_isctp; 572 struct npc_lt_def_ipsec rx_ipsec[2]; 573 struct npc_lt_def pck_ol2; 574 struct npc_lt_def pck_oip4; 575 struct npc_lt_def pck_oip6; 576 struct npc_lt_def pck_iip4; 577 struct npc_lt_def_apad rx_apad0; 578 struct npc_lt_def_apad rx_apad1; 579 struct npc_lt_def_color ovlan; 580 struct npc_lt_def_color ivlan; 581 struct npc_lt_def_color rx_gen0_color; 582 struct npc_lt_def_color rx_gen1_color; 583 struct npc_lt_def_et rx_et[2]; 584 } __packed; 585 586 /* Loadable KPU profile firmware data */ 587 struct npc_kpu_profile_fwdata { 588 #define KPU_SIGN 0x00666f727075706b 589 #define KPU_NAME_LEN 32 590 /** Maximum number of custom KPU entries supported by the built-in profile. */ 591 #define KPU_MAX_CST_ENT 6 592 /* KPU Profle Header */ 593 __le64 signature; /* "kpuprof\0" (8 bytes/ASCII characters) */ 594 u8 name[KPU_NAME_LEN]; /* KPU Profile name */ 595 __le64 version; /* KPU profile version */ 596 u8 kpus; 597 u8 reserved[7]; 598 599 /* Default MKEX profile to be used with this KPU profile. May be 600 * overridden with mkex_profile module parameter. Format is same as for 601 * the MKEX profile to streamline processing. 602 */ 603 struct npc_mcam_kex mkex; 604 /* LTYPE values for specific HW offloaded protocols. */ 605 struct npc_lt_def_cfg lt_def; 606 /* Dynamically sized data: 607 * Custom KPU CAM and ACTION configuration entries. 608 * struct npc_kpu_fwdata kpu[kpus]; 609 */ 610 u8 data[]; 611 } __packed; 612 613 struct rvu_npc_mcam_rule { 614 struct flow_msg packet; 615 struct flow_msg mask; 616 u8 intf; 617 union { 618 struct nix_tx_action tx_action; 619 struct nix_rx_action rx_action; 620 }; 621 u64 vtag_action; 622 struct list_head list; 623 u64 features; 624 u16 owner; 625 u16 entry; 626 u16 cntr; 627 bool has_cntr; 628 u8 default_rule; 629 bool enable; 630 bool vfvlan_cfg; 631 u16 chan; 632 u16 chan_mask; 633 u8 lxmb; 634 }; 635 636 #endif /* NPC_H */ 637