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Searched refs:zynqmp_mmio_write (Results 1 – 6 of 6) sorted by relevance

/openbmc/u-boot/board/xilinx/zynqmp/
H A Dtap_delays.c69 zynqmp_mmio_write(SD_DLL_CTRL, SD0_DLL_RST_MASK, in zynqmp_dll_reset()
72 zynqmp_mmio_write(SD_DLL_CTRL, SD1_DLL_RST_MASK, in zynqmp_dll_reset()
89 zynqmp_mmio_write(SD_OTAP_DLY, SD0_OTAPDLYSEL_MASK, in arasan_zynqmp_tap_sdr104()
109 zynqmp_mmio_write(SD_ITAP_DLY, SD0_ITAPCHGWIN_MASK, in arasan_zynqmp_tap_hs()
111 zynqmp_mmio_write(SD_ITAP_DLY, SD0_ITAPDLYENA_MASK, in arasan_zynqmp_tap_hs()
113 zynqmp_mmio_write(SD_ITAP_DLY, SD0_ITAPDLYSEL_MASK, in arasan_zynqmp_tap_hs()
125 zynqmp_mmio_write(SD_ITAP_DLY, SD1_ITAPCHGWIN_MASK, in arasan_zynqmp_tap_hs()
127 zynqmp_mmio_write(SD_ITAP_DLY, SD1_ITAPDLYENA_MASK, in arasan_zynqmp_tap_hs()
129 zynqmp_mmio_write(SD_ITAP_DLY, SD1_ITAPDLYSEL_MASK, in arasan_zynqmp_tap_hs()
203 zynqmp_mmio_write(SD_DLL_CTRL, SD0_DLL_RST_MASK, in arasan_zynqmp_set_tapdelay()
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H A Dcmds.c99 ret = zynqmp_mmio_write(addr, mask, val); in do_zynqmp_mmio_write()
/openbmc/u-boot/arch/arm/mach-zynqmp/include/mach/
H A Dsys_proto.h63 int zynqmp_mmio_write(const u32 address, const u32 mask, const u32 value);
/openbmc/u-boot/arch/arm/mach-zynqmp/
H A Dcpu.c230 int zynqmp_mmio_write(const u32 address, in zynqmp_mmio_write() function
/openbmc/u-boot/drivers/clk/
H A Dclk_zynqmp.c559 ret = zynqmp_mmio_write(reg, mask, clk_ctrl); in zynqmp_clk_set_peripheral_rate()
/openbmc/u-boot/drivers/spi/
H A Dzynqmp_gqspi.c286 zynqmp_mmio_write(IOU_TAPDLY_BYPASS_OFST, IOU_TAPDLY_BYPASS_MASK, in zynqmp_qspi_set_tapdelay()