Searched refs:wm_low (Results 1 – 14 of 14) sorted by relevance
1021 wm_low.yclk = in dce_v8_0_program_watermarks()1023 wm_low.sclk = in dce_v8_0_program_watermarks()1030 wm_low.disp_clk = mode->clock; in dce_v8_0_program_watermarks()1033 wm_low.blank_time = line_time - wm_low.active_time; in dce_v8_0_program_watermarks()1034 wm_low.interlaced = false; in dce_v8_0_program_watermarks()1036 wm_low.interlaced = true; in dce_v8_0_program_watermarks()1037 wm_low.vsc = amdgpu_crtc->vsc; in dce_v8_0_program_watermarks()1038 wm_low.vtaps = 1; in dce_v8_0_program_watermarks()1040 wm_low.vtaps = 2; in dce_v8_0_program_watermarks()1042 wm_low.lb_size = lb_size; in dce_v8_0_program_watermarks()[all …]
883 wm_low.yclk = in dce_v6_0_program_watermarks()885 wm_low.sclk = in dce_v6_0_program_watermarks()892 wm_low.disp_clk = mode->clock; in dce_v6_0_program_watermarks()895 wm_low.blank_time = line_time - wm_low.active_time; in dce_v6_0_program_watermarks()896 wm_low.interlaced = false; in dce_v6_0_program_watermarks()898 wm_low.interlaced = true; in dce_v6_0_program_watermarks()899 wm_low.vsc = amdgpu_crtc->vsc; in dce_v6_0_program_watermarks()900 wm_low.vtaps = 1; in dce_v6_0_program_watermarks()902 wm_low.vtaps = 2; in dce_v6_0_program_watermarks()904 wm_low.lb_size = lb_size; in dce_v6_0_program_watermarks()[all …]
1082 wm_low.yclk = in dce_v10_0_program_watermarks()1084 wm_low.sclk = in dce_v10_0_program_watermarks()1091 wm_low.disp_clk = mode->clock; in dce_v10_0_program_watermarks()1094 wm_low.blank_time = line_time - wm_low.active_time; in dce_v10_0_program_watermarks()1095 wm_low.interlaced = false; in dce_v10_0_program_watermarks()1097 wm_low.interlaced = true; in dce_v10_0_program_watermarks()1098 wm_low.vsc = amdgpu_crtc->vsc; in dce_v10_0_program_watermarks()1099 wm_low.vtaps = 1; in dce_v10_0_program_watermarks()1101 wm_low.vtaps = 2; in dce_v10_0_program_watermarks()1103 wm_low.lb_size = lb_size; in dce_v10_0_program_watermarks()[all …]
1114 wm_low.yclk = in dce_v11_0_program_watermarks()1116 wm_low.sclk = in dce_v11_0_program_watermarks()1123 wm_low.disp_clk = mode->clock; in dce_v11_0_program_watermarks()1126 wm_low.blank_time = line_time - wm_low.active_time; in dce_v11_0_program_watermarks()1127 wm_low.interlaced = false; in dce_v11_0_program_watermarks()1129 wm_low.interlaced = true; in dce_v11_0_program_watermarks()1130 wm_low.vsc = amdgpu_crtc->vsc; in dce_v11_0_program_watermarks()1131 wm_low.vtaps = 1; in dce_v11_0_program_watermarks()1133 wm_low.vtaps = 2; in dce_v11_0_program_watermarks()1135 wm_low.lb_size = lb_size; in dce_v11_0_program_watermarks()[all …]
409 u32 wm_low; member
2210 wm_low.yclk = in evergreen_program_watermarks()2212 wm_low.sclk = in evergreen_program_watermarks()2219 wm_low.disp_clk = mode->clock; in evergreen_program_watermarks()2222 wm_low.blank_time = line_time - wm_low.active_time; in evergreen_program_watermarks()2223 wm_low.interlaced = false; in evergreen_program_watermarks()2225 wm_low.interlaced = true; in evergreen_program_watermarks()2226 wm_low.vsc = radeon_crtc->vsc; in evergreen_program_watermarks()2227 wm_low.vtaps = 1; in evergreen_program_watermarks()2229 wm_low.vtaps = 2; in evergreen_program_watermarks()2231 wm_low.lb_size = lb_size; in evergreen_program_watermarks()[all …]
2352 wm_low.yclk = in dce6_program_watermarks()2354 wm_low.sclk = in dce6_program_watermarks()2361 wm_low.disp_clk = mode->clock; in dce6_program_watermarks()2364 wm_low.blank_time = line_time - wm_low.active_time; in dce6_program_watermarks()2365 wm_low.interlaced = false; in dce6_program_watermarks()2367 wm_low.interlaced = true; in dce6_program_watermarks()2368 wm_low.vsc = radeon_crtc->vsc; in dce6_program_watermarks()2369 wm_low.vtaps = 1; in dce6_program_watermarks()2371 wm_low.vtaps = 2; in dce6_program_watermarks()2373 wm_low.lb_size = lb_size; in dce6_program_watermarks()[all …]
9290 wm_low.yclk = in dce8_program_watermarks()9292 wm_low.sclk = in dce8_program_watermarks()9299 wm_low.disp_clk = mode->clock; in dce8_program_watermarks()9302 wm_low.blank_time = line_time - wm_low.active_time; in dce8_program_watermarks()9303 wm_low.interlaced = false; in dce8_program_watermarks()9305 wm_low.interlaced = true; in dce8_program_watermarks()9306 wm_low.vsc = radeon_crtc->vsc; in dce8_program_watermarks()9307 wm_low.vtaps = 1; in dce8_program_watermarks()9309 wm_low.vtaps = 2; in dce8_program_watermarks()9311 wm_low.lb_size = lb_size; in dce8_program_watermarks()[all …]
359 u32 wm_low; member
5330 radeon_crtc->wm_low / radeon_crtc->line_time) != PPSMC_Result_OK) in si_upload_smc_data()
284 .wm_low = &wcn3990_src_wm_low,303 .wm_low = &wcn3990_dst_wm_low,438 .wm_low = &qcax_src_wm_low,457 .wm_low = &qcax_dst_wm_low,
331 (addr & ~(srcr_wm->wm_low->mask)) | in ath10k_ce_src_ring_lowmark_set()332 (ath10k_set_ring_byte(n, srcr_wm->wm_low))); in ath10k_ce_src_ring_lowmark_set()355 (addr & ~(dstr_wm->wm_low->mask)) | in ath10k_ce_dest_ring_lowmark_set()356 (ath10k_set_ring_byte(n, dstr_wm->wm_low))); in ath10k_ce_dest_ring_lowmark_set()
339 struct ath10k_hw_ce_regs_addr_map *wm_low; member
5829 amdgpu_crtc->wm_low / amdgpu_crtc->line_time) != PPSMC_Result_OK) in si_upload_smc_data()