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Searched refs:vpu_writel (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/media/platform/amphion/
H A Dvpu_imx8q.c46 vpu_writel(vpu, offset + MFD_BLK_CTRL_MFD_SYS_CLOCK_ENABLE_SET, 0x1f); in vpu_imx8q_setup_dec()
47 vpu_writel(vpu, offset + MFD_BLK_CTRL_MFD_SYS_RESET_SET, 0xffffffff); in vpu_imx8q_setup_dec()
63 vpu_writel(vpu, offset + SCB_BLK_CTRL_SCB_CLK_ENABLE_SET, 0x1); in vpu_imx8q_setup()
64 vpu_writel(vpu, offset + 0x190, 0xffffffff); in vpu_imx8q_setup()
65 vpu_writel(vpu, offset + SCB_BLK_CTRL_XMEM_RESET_SET, 0xffffffff); in vpu_imx8q_setup()
66 vpu_writel(vpu, offset + SCB_BLK_CTRL_SCB_CLK_ENABLE_SET, 0xE); in vpu_imx8q_setup()
67 vpu_writel(vpu, offset + SCB_BLK_CTRL_CACHE_RESET_SET, 0x7); in vpu_imx8q_setup()
68 vpu_writel(vpu, XMEM_CONTROL, 0x102); in vpu_imx8q_setup()
84 vpu_writel(vpu, offset + MFD_BLK_CTRL_MFD_SYS_RESET_CLR, 0xffffffff); in vpu_imx8q_reset_dec()
93 vpu_writel(vpu, offset + SCB_BLK_CTRL_CACHE_RESET_CLR, 0x7); in vpu_imx8q_reset()
H A Dvpu_drv.c32 void vpu_writel(struct vpu_dev *vpu, u32 reg, u32 val) in vpu_writel() function
H A Dvpu.h311 void vpu_writel(struct vpu_dev *vpu, u32 reg, u32 val);