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Searched refs:vpr (Results 1 – 10 of 10) sorted by relevance

/openbmc/qemu/target/arm/tcg/
H A Dtranslate-m-nocp.c187 store_cpu_field(tcg_constant_i32(0), v7m.vpr); in trans_VSCCLRM()
405 store_cpu_field(tmp, v7m.vpr); in gen_M_fp_sysreg_write()
410 TCGv_i32 vpr; in gen_M_fp_sysreg_write() local
412 vpr = load_cpu_field(v7m.vpr); in gen_M_fp_sysreg_write()
413 tcg_gen_deposit_i32(vpr, vpr, tmp, in gen_M_fp_sysreg_write()
415 store_cpu_field(vpr, v7m.vpr); in gen_M_fp_sysreg_write()
552 tmp = load_cpu_field(v7m.vpr); in gen_M_fp_sysreg_read()
556 tmp = load_cpu_field(v7m.vpr); in gen_M_fp_sysreg_read()
H A Dmve_helper.c78 uint16_t mask = FIELD_EX32(env->v7m.vpr, V7M_VPR, P0); in mve_element_mask()
80 if (!(env->v7m.vpr & R_V7M_VPR_MASK01_MASK)) { in mve_element_mask()
83 if (!(env->v7m.vpr & R_V7M_VPR_MASK23_MASK)) { in mve_element_mask()
112 uint32_t vpr = env->v7m.vpr; in mve_advance_vpt() local
122 if (!(vpr & (R_V7M_VPR_MASK01_MASK | R_V7M_VPR_MASK23_MASK))) { in mve_advance_vpt()
128 mask01 = FIELD_EX32(vpr, V7M_VPR, MASK01); in mve_advance_vpt()
129 mask23 = FIELD_EX32(vpr, V7M_VPR, MASK23); in mve_advance_vpt()
140 vpr ^= inv_mask; in mve_advance_vpt()
143 vpr = FIELD_DP32(vpr, V7M_VPR, MASK01, mask01 << 1); in mve_advance_vpt()
146 vpr = FIELD_DP32(vpr, V7M_VPR, MASK23, mask23 << 1); in mve_advance_vpt()
[all …]
H A Dm_helper.c416 env->v7m.vpr, mmu_idx, STACK_LAZYFP); in HELPER()
448 env->v7m.vpr = 0; in HELPER()
1103 cpu_stl_mmu(env, fptr + 0x44, env->v7m.vpr, oi, ra); in HELPER()
1116 env->v7m.vpr = 0; in HELPER()
1176 env->v7m.vpr = cpu_ldl_mmu(env, fptr + 0x44, oi, ra); in HELPER()
1335 env->v7m.vpr, mmu_idx, STACK_NORMAL); in v7m_push_stack()
1343 env->v7m.vpr = 0; in v7m_push_stack()
1577 env->v7m.vpr = 0; in do_v7m_exception_exit()
1826 v7m_stack_read(cpu, &env->v7m.vpr, in do_v7m_exception_exit()
1839 env->v7m.vpr = 0; in do_v7m_exception_exit()
H A Dtranslate-mve.c1328 TCGv_i32 vpr = load_cpu_field(v7m.vpr); in gen_vpst() local
1333 tcg_gen_deposit_i32(vpr, vpr, in gen_vpst()
1342 tcg_gen_deposit_i32(vpr, vpr, in gen_vpst()
1349 store_cpu_field(vpr, v7m.vpr); in gen_vpst()
H A Dhflags.c573 if (env->v7m.vpr) { in mve_no_pred()
H A Dtranslate-vfp.c183 store_cpu_field(tcg_constant_i32(0), v7m.vpr); in gen_update_fp_context()
/openbmc/qemu/target/arm/
H A Dgdbstub.c211 return gdb_get_reg32(buf, env->v7m.vpr); in mve_gdb_get_reg()
224 env->v7m.vpr = ldl_p(buf); in mve_gdb_set_reg()
H A Dmachine.c524 VMSTATE_UINT32(env.v7m.vpr, ARMCPU),
H A Dcpu.h623 uint32_t vpr; member
H A Dcpu.c1432 qemu_fprintf(f, "VPR: %08x\n", env->v7m.vpr); in arm_cpu_dump_state()