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Searched refs:vpll_mdiv (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/mach-exynos/
H A Dclock_init.h59 unsigned vpll_mdiv; member
H A Dclock_init_exynos5.c156 .vpll_mdiv = 0xd7,
280 .vpll_mdiv = 0x96,
383 .vpll_mdiv = 0x96,
664 val = set_pll(mem->vpll_mdiv, mem->vpll_pdiv, mem->vpll_sdiv); in exynos5250_system_clock_init()
884 val = set_pll(mem->vpll_mdiv, mem->vpll_pdiv, mem->vpll_sdiv); in exynos5420_system_clock_init()