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Searched refs:vdd (Results 1 – 25 of 119) sorted by relevance

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/openbmc/u-boot/board/freescale/common/
H A Dvid.c36 int __weak board_adjust_vdd(int vdd) in board_adjust_vdd() argument
225 static int wait_for_new_voltage(int vdd, int i2caddress) in wait_for_new_voltage() argument
240 abs(vdd - vdd_current) > (IR_VDD_STEP_UP + IR_VDD_STEP_DOWN) && in wait_for_new_voltage()
257 int timeout, vdd_current, vdd; in wait_for_voltage_stable() local
259 vdd = read_voltage(i2caddress); in wait_for_voltage_stable()
268 abs(vdd - vdd_current) > ADC_MIN_ACCURACY && in wait_for_voltage_stable()
270 vdd = vdd_current; in wait_for_voltage_stable()
280 static int set_voltage_to_IR(int i2caddress, int vdd) in set_voltage_to_IR() argument
289 vdd += board_vdd_drop_compensation(); in set_voltage_to_IR()
291 vid = DIV_ROUND_UP(vdd - 265, 5); in set_voltage_to_IR()
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/openbmc/u-boot/arch/arm/cpu/armv8/fsl-layerscape/
H A Dsoc.c341 int vdd; in get_core_volt_from_fuse() local
357 vdd = -EINVAL; in get_core_volt_from_fuse()
361 vdd = 900; in get_core_volt_from_fuse()
364 vdd = 1000; in get_core_volt_from_fuse()
367 vdd = -EINVAL; in get_core_volt_from_fuse()
371 debug("%s: The required minimum volt of CORE is %dmV\n", __func__, vdd); in get_core_volt_from_fuse()
373 return vdd; in get_core_volt_from_fuse()
483 int vdd; in get_core_volt_from_fuse() local
498 vdd = -EINVAL; in get_core_volt_from_fuse()
502 vdd = 900; in get_core_volt_from_fuse()
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/openbmc/u-boot/board/freescale/ls1088a/
H A Dddr.c18 int vdd; in fsl_ddr_setup_0v9_volt() local
20 vdd = get_core_volt_from_fuse(); in fsl_ddr_setup_0v9_volt()
22 if (vdd < 0) in fsl_ddr_setup_0v9_volt()
25 if (vdd == 900) { in fsl_ddr_setup_0v9_volt()
/openbmc/u-boot/doc/device-tree-bindings/adc/
H A Dadc.txt10 - vdd-polarity-negative: positive reference Voltage has a negative polarity
16 - vdd-supply: phandle to Vdd regulator's node
20 - vdd-microvolts: positive reference Voltage value [uV]
28 vdd-microvolts = <1800000>;
57 vdd-supply = <&buck2>;
/openbmc/u-boot/doc/device-tree-bindings/video/
H A Dtegra20-dc.txt36 - nvidia,backlight-vdd-gpios: backlight power GPIO
37 - nvidia,panel-vdd-gpios: panel power GPIO
82 nvidia,backlight-vdd-gpios = <&gpio 176 0>; /* PW0 */
83 nvidia,panel-vdd-gpios = <&gpio 22 0>; /* PC6 */
/openbmc/u-boot/drivers/phy/
H A Dphy-stm32-usbphyc.c55 struct udevice *vdd; member
227 if (usbphyc_phy->vdd) { in stm32_usbphyc_phy_power_on()
228 ret = regulator_set_enable(usbphyc_phy->vdd, true); in stm32_usbphyc_phy_power_on()
262 if (usbphyc_phy->vdd) { in stm32_usbphyc_phy_power_off()
263 ret = regulator_set_enable(usbphyc_phy->vdd, false); in stm32_usbphyc_phy_power_off()
366 &usbphyc_phy->vdd); in stm32_usbphyc_probe()
/openbmc/u-boot/drivers/misc/
H A Dmpc83xx_serdes.c120 bool vdd; in mpc83xx_serdes_probe() local
141 vdd = dev_read_bool(dev, "vdd"); in mpc83xx_serdes_probe()
144 if (vdd) { in mpc83xx_serdes_probe()
/openbmc/u-boot/cmd/
H A Dadc.c39 int ret, vss, vdd; in do_adc_info() local
60 ret = adc_vdd_value(dev, &vdd); in do_adc_info()
62 printf("vdd: %duV\n", vdd); in do_adc_info()
/openbmc/u-boot/Documentation/devicetree/bindings/misc/
H A Dfsl,mpc83xx-serdes.txt14 - vdd: determines whether 1.0V core VDD is used or not
23 vdd;
/openbmc/u-boot/arch/arm/dts/
H A Dsun6i-a31s-primo81.dts209 regulator-name = "vdd-cpus"; /* This is an educated guess */
222 regulator-name = "vdd-gpu";
229 regulator-name = "vdd-cpu";
236 regulator-name = "vdd-sys-dll";
266 regulator-name = "vdd-mipi-bridge";
271 vdd-mipi-bridge-supply = <&reg_eldo3>;
H A Dsun50i-h6-orangepi.dtsi116 regulator-name = "vdd-cpu";
122 regulator-name = "vdd-gpu";
129 regulator-name = "vdd-sys";
H A Dsun6i-a31s-sinovoip-bpi-m2.dts221 regulator-name = "vdd-cpus";
228 regulator-name = "vdd-3v0";
234 regulator-name = "vdd-gpu";
241 regulator-name = "vdd-cpu";
248 regulator-name = "vdd-sys-dll";
280 regulator-name = "vdd-csi";
H A Dsun6i-a31s-sina31s-core.dtsi98 regulator-name = "vdd-cpus";
111 regulator-name = "vdd-gpu";
118 regulator-name = "vdd-cpu";
125 regulator-name = "vdd-sys-dll";
H A Dsun8i-a83t-tbs-a711.dts256 regulator-name = "vdd-drampll";
277 regulator-name = "vdd-cpu-A";
284 regulator-name = "vdd-cpu-B";
290 regulator-name = "vdd-gpu";
304 regulator-name = "vdd-sys";
322 regulator-name = "vdd-csi";
364 regulator-name = "vdd-cpus";
H A Dsun50i-h6-pine-h64.dts145 regulator-name = "vdd-cpu";
151 regulator-name = "vdd-gpu";
158 regulator-name = "vdd-sys";
H A Dsun50i-a64-sopine.dtsi111 regulator-name = "vdd-cpux";
127 regulator-name = "vdd-sys";
134 regulator-name = "vdd-1v8-lpddr";
152 regulator-name = "vdd-cpus";
H A Dsun50i-a64-pinebook.dts196 regulator-name = "vdd-cpux";
212 regulator-name = "vdd-sys";
249 regulator-name = "vdd-1v8-csi";
262 regulator-name = "vdd-cpus";
H A Dsun6i-a31s-yones-toptech-bs1078-v2.dts140 regulator-name = "vdd-cpus";
153 regulator-name = "vdd-gpu";
160 regulator-name = "vdd-cpu";
167 regulator-name = "vdd-sys-dll";
H A Dsun6i-reference-design-tablet.dtsi120 regulator-name = "vdd-cpus"; /* This is an educated guess */
133 regulator-name = "vdd-gpu";
140 regulator-name = "vdd-cpu";
147 regulator-name = "vdd-sys-dll";
H A Dsun9i-a80-cubieboard4.dts91 vdd-supply = <&reg_dcdc1>;
224 regulator-name = "vdd-cpus-09-usbh";
237 regulator-name = "vdd-gpu";
244 regulator-name = "vdd-cpua";
251 regulator-name = "vdd-sys-usb0-hdmi";
407 regulator-name = "vdd-cpub";
414 regulator-name = "vdd-vpu";
H A Dsun8i-a83t-allwinner-h8homlet-v2.dts181 regulator-name = "vdd-cpua";
188 regulator-name = "vdd-cpub";
194 regulator-name = "vdd-gpu";
208 regulator-name = "vdd-sys";
243 regulator-name = "vdd-cpus";
/openbmc/u-boot/board/freescale/ls1046ardb/
H A Dls1046ardb.c100 int board_setup_core_volt(u32 vdd) in board_setup_core_volt() argument
104 en_0v9 = (vdd == 900) ? true : false; in board_setup_core_volt()
/openbmc/u-boot/board/freescale/t4qds/
H A Dt4240qds.c216 static const uint16_t vdd[32] = { in adjust_vdd() local
264 vdd_target = vdd[vid]; in adjust_vdd()
722 int vdd, rcwsrc; in board_detail() local
732 vdd = read_voltage(); in board_detail()
733 if (vdd > 0) in board_detail()
734 printf("Core voltage= %d mV\n", vdd); in board_detail()
/openbmc/u-boot/arch/powerpc/include/asm/
H A Dfsl_mpc83xx_serdes.h22 extern void fsl_setup_serdes(u32 offset, char proto, u32 rfcks, char vdd);
/openbmc/u-boot/arch/powerpc/cpu/mpc83xx/
H A Dserdes.c47 void fsl_setup_serdes(u32 offset, char proto, u32 rfcks, char vdd) in fsl_setup_serdes() argument
53 if (vdd) { in fsl_setup_serdes()

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