Searched refs:uvd_clocks (Results 1 – 9 of 9) sorted by relevance
163 struct PP_UVD_CLOCKS uvd_clocks; member
130 struct smu10_uvd_clocks uvd_clocks; member
146 struct smu8_uvd_clocks uvd_clocks; member
933 smu10_ps->uvd_clocks.vclk = ps->uvd_clocks.VCLK; in smu10_dpm_get_pp_table_entry()934 smu10_ps->uvd_clocks.dclk = ps->uvd_clocks.DCLK; in smu10_dpm_get_pp_table_entry()
758 ps->uvd_clocks.VCLK = le32_to_cpu(pnon_clock_info->ulVCLK); in init_non_clock_fields()759 ps->uvd_clocks.DCLK = le32_to_cpu(pnon_clock_info->ulDCLK); in init_non_clock_fields()761 ps->uvd_clocks.VCLK = 0; in init_non_clock_fields()762 ps->uvd_clocks.DCLK = 0; in init_non_clock_fields()
1438 smu8_ps->uvd_clocks.vclk = ps->uvd_clocks.VCLK; in smu8_dpm_get_pp_table_entry()1439 smu8_ps->uvd_clocks.dclk = ps->uvd_clocks.DCLK; in smu8_dpm_get_pp_table_entry()
3636 power_state->uvd_clocks.VCLK = 0; in smu7_get_pp_table_entry_callback_func_v1()3637 power_state->uvd_clocks.DCLK = 0; in smu7_get_pp_table_entry_callback_func_v1()3729 ps->uvd_clks.vclk = state->uvd_clocks.VCLK; in smu7_get_pp_table_entry_v1()3730 ps->uvd_clks.dclk = state->uvd_clocks.DCLK; in smu7_get_pp_table_entry_v1()3877 ps->uvd_clks.vclk = state->uvd_clocks.VCLK; in smu7_get_pp_table_entry_v0()3878 ps->uvd_clks.dclk = state->uvd_clocks.DCLK; in smu7_get_pp_table_entry_v0()
3184 power_state->uvd_clocks.VCLK = 0; in vega10_get_pp_table_entry_callback_func()3185 power_state->uvd_clocks.DCLK = 0; in vega10_get_pp_table_entry_callback_func()3264 vega10_ps->uvd_clks.vclk = state->uvd_clocks.VCLK; in vega10_get_pp_table_entry()3265 vega10_ps->uvd_clks.dclk = state->uvd_clocks.DCLK; in vega10_get_pp_table_entry()
199 struct smu_uvd_clocks uvd_clocks; member