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Searched refs:usdhc_cfg (Results 1 – 25 of 46) sorted by relevance

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/openbmc/u-boot/board/freescale/mx6slevk/
H A Dmx6slevk.c262 static struct fsl_esdhc_cfg usdhc_cfg[3] = { variable
306 usdhc_cfg[0].esdhc_base = USDHC1_BASE_ADDR; in board_mmc_init()
307 usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); in board_mmc_init()
313 usdhc_cfg[0].esdhc_base = USDHC2_BASE_ADDR; in board_mmc_init()
314 usdhc_cfg[0].max_bus_width = 4; in board_mmc_init()
315 usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); in board_mmc_init()
321 usdhc_cfg[0].esdhc_base = USDHC3_BASE_ADDR; in board_mmc_init()
322 usdhc_cfg[0].max_bus_width = 4; in board_mmc_init()
323 usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); in board_mmc_init()
327 gd->arch.sdhc_clk = usdhc_cfg[0].sdhc_clk; in board_mmc_init()
[all …]
/openbmc/u-boot/board/k+p/kp_imx6q_tpc/
H A Dkp_imx6q_tpc_spl.c258 struct fsl_esdhc_cfg usdhc_cfg[] = { variable
296 usdhc_cfg[0].esdhc_base = USDHC2_BASE_ADDR; in board_mmc_init()
297 usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); in board_mmc_init()
298 gd->arch.sdhc_clk = usdhc_cfg[0].sdhc_clk; in board_mmc_init()
302 usdhc_cfg[0].esdhc_base = USDHC4_BASE_ADDR; in board_mmc_init()
303 usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); in board_mmc_init()
304 gd->arch.sdhc_clk = usdhc_cfg[0].sdhc_clk; in board_mmc_init()
308 return fsl_esdhc_initialize(bd, &usdhc_cfg[0]); in board_mmc_init()
H A Dkp_imx6q_tpc.c172 static struct fsl_esdhc_cfg usdhc_cfg[] = { variable
203 usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); in board_mmc_init()
204 usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); in board_mmc_init()
207 ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]); in board_mmc_init()
/openbmc/u-boot/board/logicpd/imx6/
H A Dimx6logic.c203 struct fsl_esdhc_cfg usdhc_cfg[] = { variable
225 usdhc_cfg[0].esdhc_base = USDHC1_BASE_ADDR; in board_mmc_init()
226 usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); in board_mmc_init()
227 gd->arch.sdhc_clk = usdhc_cfg[0].sdhc_clk; in board_mmc_init()
231 usdhc_cfg[1].esdhc_base = USDHC2_BASE_ADDR; in board_mmc_init()
232 usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); in board_mmc_init()
233 gd->arch.sdhc_clk = usdhc_cfg[1].sdhc_clk; in board_mmc_init()
237 return fsl_esdhc_initialize(bis, &usdhc_cfg[reg]); in board_mmc_init()
/openbmc/u-boot/board/freescale/mx6sabresd/
H A Dmx6sabresd.c254 struct fsl_esdhc_cfg usdhc_cfg[3] = { variable
307 usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); in board_mmc_init()
313 usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); in board_mmc_init()
317 usdhc_cfg[2].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); in board_mmc_init()
326 ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]); in board_mmc_init()
347 usdhc_cfg[0].esdhc_base = USDHC2_BASE_ADDR; in board_mmc_init()
348 usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); in board_mmc_init()
349 gd->arch.sdhc_clk = usdhc_cfg[0].sdhc_clk; in board_mmc_init()
353 usdhc_cfg[0].esdhc_base = USDHC3_BASE_ADDR; in board_mmc_init()
354 usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); in board_mmc_init()
[all …]
/openbmc/u-boot/board/el/el6x/
H A Del6x.c259 struct fsl_esdhc_cfg usdhc_cfg[2] = { variable
302 usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); in board_mmc_init()
307 usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); in board_mmc_init()
316 ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]); in board_mmc_init()
339 usdhc_cfg[0].esdhc_base = USDHC2_BASE_ADDR; in board_mmc_init()
340 usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); in board_mmc_init()
341 gd->arch.sdhc_clk = usdhc_cfg[0].sdhc_clk; in board_mmc_init()
346 usdhc_cfg[0].esdhc_base = USDHC4_BASE_ADDR; in board_mmc_init()
347 usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); in board_mmc_init()
348 gd->arch.sdhc_clk = usdhc_cfg[0].sdhc_clk; in board_mmc_init()
[all …]
/openbmc/u-boot/board/kosagi/novena/
H A Dnovena.c107 static struct fsl_esdhc_cfg usdhc_cfg[] = { variable
140 usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); in board_mmc_init()
141 usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); in board_mmc_init()
147 for (index = 0; index < ARRAY_SIZE(usdhc_cfg); index++) { in board_mmc_init()
148 status = fsl_esdhc_initialize(bis, &usdhc_cfg[index]); in board_mmc_init()
/openbmc/u-boot/board/gateworks/gw_ventana/
H A Dcommon.c1660 static struct fsl_esdhc_cfg usdhc_cfg[2]; variable
1675 usdhc_cfg[0].esdhc_base = USDHC3_BASE_ADDR; in board_mmc_init()
1676 usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); in board_mmc_init()
1677 usdhc_cfg[0].max_bus_width = 4; in board_mmc_init()
1678 return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); in board_mmc_init()
1682 usdhc_cfg[0].esdhc_base = USDHC2_BASE_ADDR; in board_mmc_init()
1683 usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); in board_mmc_init()
1684 usdhc_cfg[0].max_bus_width = 8; in board_mmc_init()
1685 ret = fsl_esdhc_initialize(bis, &usdhc_cfg[0]); in board_mmc_init()
1690 usdhc_cfg[1].esdhc_base = USDHC3_BASE_ADDR; in board_mmc_init()
[all …]
/openbmc/u-boot/board/toradex/apalis_imx6/
H A Dapalis_imx6.c364 struct fsl_esdhc_cfg usdhc_cfg[CONFIG_SYS_FSL_USDHC_NUM] = { variable
395 usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); in board_mmc_init()
396 usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); in board_mmc_init()
397 usdhc_cfg[2].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); in board_mmc_init()
399 usdhc_cfg[0].max_bus_width = 8; in board_mmc_init()
400 usdhc_cfg[1].max_bus_width = 8; in board_mmc_init()
401 usdhc_cfg[2].max_bus_width = 4; in board_mmc_init()
423 status |= fsl_esdhc_initialize(bis, &usdhc_cfg[index]); in board_mmc_init()
443 usdhc_cfg[0].esdhc_base = USDHC1_BASE_ADDR; in board_mmc_init()
444 usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); in board_mmc_init()
[all …]
/openbmc/u-boot/board/phytec/pcm058/
H A Dpcm058.c148 static struct fsl_esdhc_cfg usdhc_cfg[] = { variable
215 usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); in board_mmc_init()
221 usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); in board_mmc_init()
231 ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]); in board_mmc_init()
254 usdhc_cfg[0].esdhc_base = USDHC1_BASE_ADDR; in board_mmc_init()
255 usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); in board_mmc_init()
256 usdhc_cfg[0].max_bus_width = 4; in board_mmc_init()
257 gd->arch.sdhc_clk = usdhc_cfg[0].sdhc_clk; in board_mmc_init()
260 return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); in board_mmc_init()
/openbmc/u-boot/board/seco/mx6quq7/
H A Dmx6quq7.c95 static struct fsl_esdhc_cfg usdhc_cfg[2] = { variable
132 usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); in board_mmc_init()
136 usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); in board_mmc_init()
145 ret = fsl_esdhc_initialize(bis, &usdhc_cfg[index]); in board_mmc_init()
/openbmc/u-boot/board/freescale/mx6sxsabresd/
H A Dmx6sxsabresd.c328 static struct fsl_esdhc_cfg usdhc_cfg[3] = { variable
395 usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); in board_mmc_init()
396 usdhc_cfg[0].esdhc_base = USDHC2_BASE_ADDR; in board_mmc_init()
403 usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); in board_mmc_init()
404 usdhc_cfg[0].esdhc_base = USDHC3_BASE_ADDR; in board_mmc_init()
410 usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); in board_mmc_init()
411 usdhc_cfg[0].esdhc_base = USDHC4_BASE_ADDR; in board_mmc_init()
415 gd->arch.sdhc_clk = usdhc_cfg[0].sdhc_clk; in board_mmc_init()
416 return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); in board_mmc_init()
/openbmc/u-boot/board/bachmann/ot1200/
H A Dot1200.c223 struct fsl_esdhc_cfg usdhc_cfg[2] = { variable
233 usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); in board_mmc_init()
234 usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); in board_mmc_init()
236 usdhc_cfg[0].max_bus_width = 8; in board_mmc_init()
237 usdhc_cfg[1].max_bus_width = 4; in board_mmc_init()
256 ret = fsl_esdhc_initialize(bis, &usdhc_cfg[index]); in board_mmc_init()
/openbmc/u-boot/board/toradex/colibri_imx6/
H A Dcolibri_imx6.c307 struct fsl_esdhc_cfg usdhc_cfg[CONFIG_SYS_FSL_USDHC_NUM] = { variable
333 usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); in board_mmc_init()
334 usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); in board_mmc_init()
336 usdhc_cfg[0].max_bus_width = 8; in board_mmc_init()
337 usdhc_cfg[1].max_bus_width = 4; in board_mmc_init()
355 status |= fsl_esdhc_initialize(bis, &usdhc_cfg[index]); in board_mmc_init()
375 usdhc_cfg[0].esdhc_base = USDHC1_BASE_ADDR; in board_mmc_init()
376 usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); in board_mmc_init()
377 gd->arch.sdhc_clk = usdhc_cfg[0].sdhc_clk; in board_mmc_init()
382 usdhc_cfg[0].esdhc_base = USDHC3_BASE_ADDR; in board_mmc_init()
[all …]
/openbmc/u-boot/board/barco/platinum/
H A Dplatinum.c59 struct fsl_esdhc_cfg usdhc_cfg[] = { variable
107 if (cfg->esdhc_base == usdhc_cfg[0].esdhc_base) { in board_mmc_getcd()
119 usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); in board_mmc_init()
121 return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); in board_mmc_init()
/openbmc/u-boot/board/phytec/pfla02/
H A Dpfla02.c152 static struct fsl_esdhc_cfg usdhc_cfg[] = { variable
218 usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); in board_mmc_init()
223 usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); in board_mmc_init()
232 ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]); in board_mmc_init()
565 usdhc_cfg[0].esdhc_base = USDHC3_BASE_ADDR; in board_mmc_init()
566 usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); in board_mmc_init()
567 usdhc_cfg[0].max_bus_width = 4; in board_mmc_init()
568 gd->arch.sdhc_clk = usdhc_cfg[0].sdhc_clk; in board_mmc_init()
570 return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); in board_mmc_init()
/openbmc/u-boot/board/embest/mx6boards/
H A Dmx6boards.c185 struct fsl_esdhc_cfg usdhc_cfg[3] = { variable
239 usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); in board_mmc_init()
240 usdhc_cfg[0].max_bus_width = 4; in board_mmc_init()
255 usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); in board_mmc_init()
256 usdhc_cfg[1].max_bus_width = 4; in board_mmc_init()
261 usdhc_cfg[2].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); in board_mmc_init()
262 usdhc_cfg[2].max_bus_width = 4; in board_mmc_init()
274 ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]); in board_mmc_init()
/openbmc/u-boot/board/dhelectronics/dh_imx6/
H A Ddh_imx6.c195 static struct fsl_esdhc_cfg usdhc_cfg[3] = { variable
231 usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); in board_mmc_init()
232 usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); in board_mmc_init()
233 usdhc_cfg[2].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); in board_mmc_init()
236 ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]); in board_mmc_init()
/openbmc/u-boot/board/freescale/imx8mq_evk/
H A Dspl.c104 static struct fsl_esdhc_cfg usdhc_cfg[2] = { variable
122 usdhc_cfg[0].sdhc_clk = mxc_get_clock(USDHC1_CLK_ROOT); in board_mmc_init()
132 usdhc_cfg[1].sdhc_clk = mxc_get_clock(USDHC2_CLK_ROOT); in board_mmc_init()
145 ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]); in board_mmc_init()
/openbmc/u-boot/board/liebherr/display5/
H A Dspl.c206 static struct fsl_esdhc_cfg usdhc_cfg = { variable
215 usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); in board_mmc_init()
216 gd->arch.sdhc_clk = usdhc_cfg.sdhc_clk; in board_mmc_init()
218 return fsl_esdhc_initialize(bd, &usdhc_cfg); in board_mmc_init()
/openbmc/u-boot/board/phytec/pcl063/
H A Dspl.c120 static struct fsl_esdhc_cfg usdhc_cfg[] = { variable
135 usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); in board_mmc_init()
137 return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); in board_mmc_init()
/openbmc/u-boot/board/warp/
H A Dwarp.c63 static struct fsl_esdhc_cfg usdhc_cfg[1] = { variable
90 usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); in board_mmc_init()
91 return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); in board_mmc_init()
/openbmc/u-boot/board/freescale/mx6qarm2/
H A Dmx6qarm2.c107 struct fsl_esdhc_cfg usdhc_cfg[2] = { variable
136 usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); in board_mmc_init()
137 usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); in board_mmc_init()
156 ret = fsl_esdhc_initialize(bis, &usdhc_cfg[index]); in board_mmc_init()
/openbmc/u-boot/board/udoo/
H A Dudoo.c174 static struct fsl_esdhc_cfg usdhc_cfg = { USDHC3_BASE_ADDR }; variable
218 usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); in board_mmc_init()
219 usdhc_cfg.max_bus_width = 4; in board_mmc_init()
221 return fsl_esdhc_initialize(bis, &usdhc_cfg); in board_mmc_init()
/openbmc/u-boot/board/technexion/pico-imx6ul/
H A Dspl.c163 static struct fsl_esdhc_cfg usdhc_cfg[1] = { variable
175 usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); in board_mmc_init()
176 return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); in board_mmc_init()

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