Searched refs:update_win (Results 1 – 5 of 5) sorted by relevance
51 bool update_win; member
100 acrtc->dm_irq_params.window_param.update_win = false; in amdgpu_dm_set_crc_window_default()506 if (acrtc->dm_irq_params.window_param.update_win) { in amdgpu_dm_crtc_handle_crc_window_irq()516 acrtc->dm_irq_params.window_param.update_win = false; in amdgpu_dm_crtc_handle_crc_window_irq()
3210 acrtc->dm_irq_params.window_param.update_win = false; in crc_win_x_start_set()3247 acrtc->dm_irq_params.window_param.update_win = false; in crc_win_y_start_set()3283 acrtc->dm_irq_params.window_param.update_win = false; in crc_win_x_end_set()3319 acrtc->dm_irq_params.window_param.update_win = false; in crc_win_y_end_set()3363 acrtc->dm_irq_params.window_param.update_win = true; in crc_win_update_set()
8983 acrtc->dm_irq_params.window_param.update_win = true; in amdgpu_dm_atomic_commit_tail()
308 int update_win; in ddr3_find_adll_limits() local474 update_win = 0; in ddr3_find_adll_limits()485 update_win = 1; in ddr3_find_adll_limits()495 update_win = in ddr3_find_adll_limits()500 if (update_win == 1) { in ddr3_find_adll_limits()