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Searched refs:uint32 (Results 1 – 25 of 66) sorted by relevance

123

/openbmc/qemu/tests/tcg/i386/
H A Dfloat_convd.conf6 to uint32: 0 (INVALID)
12 to uint32: 0 (INVALID)
18 to uint32: 0 (INVALID)
24 to uint32: 0 (INVALID)
30 to uint32: 0 (INVALID)
36 to uint32: 0 (INVALID)
42 to uint32: 0 (INVALID)
48 to uint32: 0 (INVALID)
54 to uint32: -2 (OK)
60 to uint32: -1 (OK)
[all …]
H A Dfloat_convs.ref6 to uint32: 0 (INVALID)
12 to uint32: 0 (INVALID)
18 to uint32: 0 (INVALID)
24 to uint32: 0 (INVALID)
30 to uint32: 0 (INVALID)
36 to uint32: 0 (INVALID)
42 to uint32: 0 (INEXACT )
48 to uint32: 0 (INEXACT )
54 to uint32: 0 (INEXACT )
60 to uint32: 0 (OK)
[all …]
/openbmc/qemu/tests/tcg/aarch64/
H A Dfloat_convs.ref6 to uint32: 0 (INVALID)
12 to uint32: 0 (INVALID)
18 to uint32: 0 (INVALID)
24 to uint32: 0 (INVALID)
30 to uint32: 0 (INVALID)
36 to uint32: 0 (INVALID)
42 to uint32: 0 (INEXACT )
48 to uint32: 0 (INEXACT )
54 to uint32: 0 (INEXACT )
60 to uint32: 0 (OK)
[all …]
H A Dfloat_convd.ref6 to uint32: 0 (INVALID)
12 to uint32: 0 (INVALID)
18 to uint32: 0 (INVALID)
24 to uint32: 0 (INVALID)
30 to uint32: 0 (INVALID)
36 to uint32: 0 (INVALID)
42 to uint32: 0 (INVALID)
48 to uint32: 0 (INVALID)
54 to uint32: 0 (INVALID)
60 to uint32: 0 (INVALID)
[all …]
/openbmc/qemu/tests/tcg/hexagon/
H A Dfloat_convs.ref6 to uint32: -1 (INVALID)
12 to uint32: -1 (INVALID)
18 to uint32: 0 (INVALID)
24 to uint32: 0 (INVALID)
30 to uint32: 0 (INVALID)
36 to uint32: 0 (INVALID)
42 to uint32: 0 (INVALID)
48 to uint32: 0 (INVALID)
54 to uint32: 0 (INVALID)
60 to uint32: 0 (OK)
[all …]
H A Dfloat_convd.ref6 to uint32: -1 (INVALID)
12 to uint32: -1 (INVALID)
18 to uint32: 0 (INVALID)
24 to uint32: 0 (INVALID)
30 to uint32: 0 (INVALID)
36 to uint32: 0 (INVALID)
42 to uint32: 0 (INVALID)
48 to uint32: 0 (INVALID)
54 to uint32: 0 (INVALID)
60 to uint32: 0 (INVALID)
[all …]
/openbmc/qemu/tests/tcg/ppc64le/
H A Dfloat_convs.ref6 to uint32: 0 (INVALID)
12 to uint32: 0 (INVALID)
18 to uint32: 0 (INVALID)
24 to uint32: 0 (INVALID)
30 to uint32: 0 (INVALID)
36 to uint32: 0 (INVALID)
42 to uint32: 0 (INEXACT )
48 to uint32: 0 (INEXACT )
54 to uint32: 0 (INEXACT )
60 to uint32: 0 (OK)
[all …]
/openbmc/qemu/tests/tcg/loongarch64/
H A Dfloat_convs.ref6 to uint32: 0 (INVALID)
12 to uint32: 0 (INVALID)
18 to uint32: -2147483648 (INVALID)
24 to uint32: -2147483648 (INVALID)
30 to uint32: -2147483648 (INVALID)
36 to uint32: -2147483648 (INVALID)
42 to uint32: 0 (INEXACT )
48 to uint32: 0 (INEXACT )
54 to uint32: 0 (INEXACT )
60 to uint32: 0 (OK)
[all …]
H A Dfloat_convd.ref6 to uint32: 0 (INVALID)
12 to uint32: 0 (INVALID)
18 to uint32: -2147483648 (INVALID)
24 to uint32: -2147483648 (INVALID)
30 to uint32: -2147483648 (INVALID)
36 to uint32: -2147483648 (INVALID)
42 to uint32: -2147483648 (INVALID)
48 to uint32: -2147483648 (INVALID)
54 to uint32: -2 (OK)
60 to uint32: -1 (OK)
[all …]
/openbmc/qemu/tests/tcg/arm/
H A Dfloat_convs.ref6 to uint32: 0 (INVALID)
12 to uint32: 0 (INVALID)
18 to uint32: 0 (INVALID)
24 to uint32: 0 (INVALID)
30 to uint32: 0 (INVALID)
36 to uint32: 0 (INVALID)
42 to uint32: 0 (INEXACT )
48 to uint32: 0 (INEXACT )
54 to uint32: 0 (INEXACT )
60 to uint32: 0 (OK)
[all …]
H A Dfloat_convd.ref6 to uint32: 0 (INVALID)
12 to uint32: 0 (INVALID)
18 to uint32: 0 (INVALID)
24 to uint32: 0 (INVALID)
30 to uint32: 0 (INVALID)
36 to uint32: 0 (INVALID)
42 to uint32: 0 (INVALID)
48 to uint32: 0 (INVALID)
54 to uint32: 0 (INVALID)
60 to uint32: 0 (INVALID)
[all …]
/openbmc/qemu/tests/tcg/x86_64/
H A Dfloat_convs.ref6 to uint32: 0 (INVALID)
12 to uint32: 0 (INVALID)
18 to uint32: 0 (INVALID)
24 to uint32: 0 (INVALID)
30 to uint32: 0 (INVALID)
36 to uint32: 0 (INVALID)
42 to uint32: 0 (INEXACT )
48 to uint32: 0 (INEXACT )
54 to uint32: 0 (INEXACT )
60 to uint32: 0 (OK)
[all …]
H A Dfloat_convd.ref6 to uint32: 0 (INVALID)
12 to uint32: 0 (INVALID)
18 to uint32: 0 (INVALID)
24 to uint32: 0 (INVALID)
30 to uint32: 0 (INVALID)
36 to uint32: 0 (INVALID)
42 to uint32: 0 (INVALID)
48 to uint32: 0 (INVALID)
54 to uint32: -2 (OK)
60 to uint32: -1 (OK)
[all …]
/openbmc/qemu/target/xtensa/core-dsp3400/
H A Dxtensa-modules.c.inc385 Field_t_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
387 uint32 tie_t;
401 Field_s_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
403 uint32 tie_t;
417 Field_r_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
419 uint32 tie_t;
433 Field_op2_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
435 uint32 tie_t;
449 Field_op1_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
451 uint32 tie_t;
[all …]
/openbmc/qemu/target/xtensa/core-lx106/
H A Dxtensa-modules.c.inc160 Field_t_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
162 uint32 tie_t;
176 Field_s_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
178 uint32 tie_t;
192 Field_r_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
194 uint32 tie_t;
208 Field_op2_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
210 uint32 tie_t;
224 Field_op1_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
226 uint32 tie_t;
[all …]
/openbmc/qemu/qapi/
H A Drocker.json24 'data': { 'name': 'str', 'id': 'uint64', 'ports': 'uint32' } }
91 'speed': 'uint32', 'duplex': 'RockerPortDuplex',
149 'data' : { 'priority': 'uint32', 'tbl-id': 'uint32', '*in-pport': 'uint32',
150 '*tunnel-id': 'uint32', '*vlan-id': 'uint16',
179 'data' : { '*in-pport': 'uint32', '*tunnel-id': 'uint32',
206 'data' : { '*goto-tbl': 'uint32', '*group-id': 'uint32',
207 '*tunnel-lport': 'uint32', '*vlan-id': 'uint16',
208 '*new-vlan-id': 'uint16', '*out-pport': 'uint32' } }
259 'data': { 'name': 'str', '*tbl-id': 'uint32' },
299 'data': { 'id': 'uint32', 'type': 'uint8', '*vlan-id': 'uint16',
[all …]
/openbmc/qemu/target/xtensa/core-test_mmuhifi_c3/
H A Dxtensa-modules.c.inc231 Field_t_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
233 uint32 tie_t;
247 Field_s_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
249 uint32 tie_t;
263 Field_r_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
265 uint32 tie_t;
279 Field_op2_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
281 uint32 tie_t;
295 Field_op1_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
297 uint32 tie_t;
[all …]
/openbmc/qemu/target/xtensa/core-test_kc705_be/
H A Dxtensa-modules.c.inc316 Field_t_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
318 uint32 tie_t;
332 Field_s_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
334 uint32 tie_t;
348 Field_r_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
350 uint32 tie_t;
364 Field_op2_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
366 uint32 tie_t;
380 Field_op1_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
382 uint32 tie_t;
[all …]
/openbmc/qemu/target/xtensa/core-fsf/
H A Dxtensa-modules.c.inc223 Field_t_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
225 uint32 tie_t;
239 Field_s_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
241 uint32 tie_t;
255 Field_r_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
257 uint32 tie_t;
271 Field_op2_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
273 uint32 tie_t;
287 Field_op1_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
289 uint32 tie_t;
[all …]
/openbmc/qemu/target/xtensa/core-sample_controller/
H A Dxtensa-modules.c.inc234 Field_t_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
236 uint32 tie_t;
250 Field_s_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
252 uint32 tie_t;
266 Field_r_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
268 uint32 tie_t;
282 Field_op2_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
284 uint32 tie_t;
298 Field_op1_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
300 uint32 tie_t;
[all …]
/openbmc/qemu/target/xtensa/core-de212/
H A Dxtensa-modules.c.inc253 Field_t_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
255 uint32 tie_t;
269 Field_s_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
271 uint32 tie_t;
285 Field_r_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
287 uint32 tie_t;
301 Field_op2_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
303 uint32 tie_t;
317 Field_op1_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
319 uint32 tie_t;
[all …]
/openbmc/qemu/target/xtensa/core-dc233c/
H A Dxtensa-modules.c.inc288 Field_t_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
290 uint32 tie_t;
304 Field_s_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
306 uint32 tie_t;
320 Field_r_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
322 uint32 tie_t;
336 Field_op2_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
338 uint32 tie_t;
352 Field_op1_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
354 uint32 tie_t;
[all …]
/openbmc/qemu/target/xtensa/core-dc232b/
H A Dxtensa-modules.c.inc274 Field_t_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
276 uint32 tie_t;
290 Field_t_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val)
292 uint32 tie_t;
306 Field_t_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val)
308 uint32 tie_t;
322 Field_bbi4_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
324 uint32 tie_t;
339 Field_bbi_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
341 uint32 tie_t;
[all …]
/openbmc/openbmc/poky/meta/classes-recipe/
H A Dlibc-package.bbclass249 "arc": " --uint32-align=4 --little-endian ", \
250 "arceb": " --uint32-align=4 --big-endian ", \
251 "arm": " --uint32-align=4 --little-endian ", \
252 "armeb": " --uint32-align=4 --big-endian ", \
253 "aarch64": " --uint32-align=4 --little-endian ", \
254 "aarch64_be": " --uint32-align=4 --big-endian ", \
255 "sh4": " --uint32-align=4 --big-endian ", \
256 "powerpc": " --uint32-align=4 --big-endian ", \
257 "powerpc64": " --uint32-align=4 --big-endian ", \
258 "powerpc64le": " --uint32-align=4 --little-endian ", \
[all …]
/openbmc/qemu/target/xtensa/core-de233_fpu/
H A Dxtensa-modules.c.inc318 Field_t_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
320 uint32 tie_t;
334 Field_s_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
336 uint32 tie_t;
350 Field_r_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
352 uint32 tie_t;
366 Field_op2_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
368 uint32 tie_t;
382 Field_op1_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
384 uint32 tie_t;
[all …]

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