Searched refs:udivslot (Results 1 – 2 of 2) sorted by relevance
43 static const int udivslot[] = { variable83 writew(udivslot[val % 16], &uart->rest.slot); in s5p_serial_baud()
1545 unsigned int udivslot = 0; in s3c24xx_serial_set_termios() local1584 udivslot = (div & 15); in s3c24xx_serial_set_termios()1585 dev_dbg(port->dev, "fracval = %04x\n", udivslot); in s3c24xx_serial_set_termios()1587 udivslot = udivslot_table[div & 15]; in s3c24xx_serial_set_termios()1589 udivslot, div & 15); in s3c24xx_serial_set_termios()1632 ulcon, quot, udivslot); in s3c24xx_serial_set_termios()1651 wr_regl(port, S3C2443_DIVSLOT, udivslot); in s3c24xx_serial_set_termios()