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Searched refs:treset_cntr1_val (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/arch/arm/mach-socfpga/
H A Dwrap_sdram_config.c284 .treset_cntr1_val = TRESET_CNTR1_VAL,
/openbmc/u-boot/arch/arm/mach-socfpga/include/mach/
H A Dsdram_gen5.h216 u8 treset_cntr1_val; member
/openbmc/u-boot/drivers/ddr/altera/
H A Dsequencer.c990 misccfg->treset_cntr1_val, in rw_mgr_mem_initialize()