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Searched refs:tinit_cntr0_val (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/arch/arm/mach-socfpga/
H A Dwrap_sdram_config.c280 .tinit_cntr0_val = TINIT_CNTR0_VAL,
/openbmc/u-boot/arch/arm/mach-socfpga/include/mach/
H A Dsdram_gen5.h212 u8 tinit_cntr0_val; member
/openbmc/u-boot/drivers/ddr/altera/
H A Dsequencer.c967 rw_mgr_mem_init_load_regs(misccfg->tinit_cntr0_val, in rw_mgr_mem_initialize()