Searched refs:tcr_el (Results 1 – 6 of 6) sorted by relevance
/openbmc/qemu/target/arm/ |
H A D | internals.h | 464 uint64_t tcr = env->cp15.tcr_el[arm_is_secure(env) ? 3 : 1]; in extended_addresses_enabled() 1007 return env->cp15.tcr_el[regime_el(env, mmu_idx)]; in regime_tcr()
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H A D | debug_helper.c | 452 (env->cp15.tcr_el[target_el] & TTBCR_EAE)) { in arm_debug_exception_fsr()
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H A D | helper.c | 4641 .fieldoffset = offsetof(CPUARMState, cp15.tcr_el[1]) }, 4646 .bank_fieldoffsets = { offsetoflow32(CPUARMState, cp15.tcr_el[3]), 4647 offsetoflow32(CPUARMState, cp15.tcr_el[1])} }, 4659 offsetofhigh32(CPUARMState, cp15.tcr_el[3]), 4660 offsetofhigh32(CPUARMState, cp15.tcr_el[1]), 6576 .fieldoffset = offsetof(CPUARMState, cp15.tcr_el[2]) }, 6880 .fieldoffset = offsetof(CPUARMState, cp15.tcr_el[3]) }, in define_arm_vh_e2h_redirects_aliases()
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H A D | cpu.h | 315 uint64_t tcr_el[4]; 314 uint64_t tcr_el[4]; global() member
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H A D | cpu.c | 303 env->cp15.tcr_el[1] = 5 | (1ULL << 37); in arm_cpu_reset_hold()
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H A D | ptw.c | 3250 uint64_t tcr = env->cp15.tcr_el[r_el]; in get_phys_addr_disabled()
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