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Searched refs:tce (Results 1 – 4 of 4) sorted by relevance

/openbmc/qemu/hw/ppc/
H A Dspapr_iommu.c66 static IOMMUAccessFlags spapr_tce_iommu_access_flags(uint64_t tce) in spapr_tce_iommu_access_flags() argument
68 switch (tce & SPAPR_TCE_RW) { in spapr_tce_iommu_access_flags()
119 uint64_t tce; in spapr_tce_translate_iommu() local
132 tce = tcet->table[addr >> tcet->page_shift]; in spapr_tce_translate_iommu()
134 ret.translated_addr = tce & page_mask; in spapr_tce_translate_iommu()
136 ret.perm = spapr_tce_iommu_access_flags(tce); in spapr_tce_translate_iommu()
451 target_ulong tce) in put_tce_emu() argument
463 tcet->table[index] = tce; in put_tce_emu()
467 event.entry.translated_addr = tce & page_mask; in put_tce_emu()
469 event.entry.perm = spapr_tce_iommu_access_flags(tce); in put_tce_emu()
[all …]
H A Dtrace-events26 …mu_put(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t ret) "liobn=0x%"PRIx64" ioba=0x%"PRIx…
27 …t liobn, uint64_t ioba, uint64_t ret, uint64_t tce) "liobn=0x%"PRIx64" ioba=0x%"PRIx64" ret=%"PRId…
28 spapr_iommu_indirect(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t iobaN, uint64_t tceN, ui…
30 …ci_put(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t ret) "liobn=0x%"PRIx64" ioba=0x%"PRIx…
31 …t liobn, uint64_t ioba, uint64_t ret, uint64_t tce) "liobn=0x%"PRIx64" ioba=0x%"PRIx64" ret=%"PRId…
32 spapr_iommu_pci_indirect(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t iobaN, uint64_t tceN…
34 spapr_iommu_xlate(uint64_t liobn, uint64_t ioba, uint64_t tce, unsigned perm, unsigned pgsize) "lio…
/openbmc/qemu/hw/pci-host/
H A Dpnv_phb3.c776 uint64_t base, taddr, tce, tce_mask; in pnv_phb3_translate_tve() local
802 if (dma_memory_read(&address_space_memory, taddr, &tce, in pnv_phb3_translate_tve()
803 sizeof(tce), MEMTXATTRS_UNSPECIFIED)) { in pnv_phb3_translate_tve()
807 tce = be64_to_cpu(tce); in pnv_phb3_translate_tve()
810 if ((lev >= 0) && !(tce & 3)) { in pnv_phb3_translate_tve()
819 base = tce & ~0xfffull; in pnv_phb3_translate_tve()
823 if ((is_write & !(tce & 2)) || ((!is_write) && !(tce & 1))) { in pnv_phb3_translate_tve()
833 tlb->translated_addr = tce & tce_mask; in pnv_phb3_translate_tve()
835 tlb->perm = tce & 3; in pnv_phb3_translate_tve()
H A Dpnv_phb4.c1255 uint64_t base, taddr, tce, tce_mask; in pnv_phb4_translate_tve() local
1277 if (dma_memory_read(&address_space_memory, taddr, &tce, in pnv_phb4_translate_tve()
1278 sizeof(tce), MEMTXATTRS_UNSPECIFIED)) { in pnv_phb4_translate_tve()
1282 tce = be64_to_cpu(tce); in pnv_phb4_translate_tve()
1285 if ((lev >= 0) && !(tce & 3)) { in pnv_phb4_translate_tve()
1294 base = tce & ~0xfffull; in pnv_phb4_translate_tve()
1298 if ((is_write & !(tce & 2)) || ((!is_write) && !(tce & 1))) { in pnv_phb4_translate_tve()
1308 tlb->translated_addr = tce & tce_mask; in pnv_phb4_translate_tve()
1310 tlb->perm = tce & 3; in pnv_phb4_translate_tve()