Searched refs:tbr (Results 1 – 15 of 15) sorted by relevance
| /openbmc/qemu/target/sparc/ |
| H A D | int32_helper.c | 164 env->tbr = (env->tbr & TBR_BASE_MASK) | (intno << 4); in sparc_cpu_do_interrupt()
165 env->pc = env->tbr; in sparc_cpu_do_interrupt()
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| H A D | gdbstub.c | 60 return gdb_get_rega(mem_buf, env->tbr); in sparc_cpu_gdb_read_register()
154 env->tbr = tmp; in sparc_cpu_gdb_write_register()
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| H A D | monitor.c | 99 { "tbr", offsetof(CPUSPARCState, tbr) },
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| H A D | int64_helper.c | 251 env->pc = env->tbr & ~0x7fffULL; in sparc_cpu_do_interrupt()
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| H A D | machine.c | 219 VMSTATE_UINTTL(env.tbr, SPARCCPU),
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| H A D | cpu.h | 469 target_ulong tbr; /* trap base register */ member
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| H A D | cpu.c | 671 TARGET_FMT_lx "\n", env->tbr, env->hpstate, env->htba); in sparc_cpu_dump_state()
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| H A D | translate.c | 5854 { &cpu_tbr, offsetof(CPUSPARCState, tbr), "tbr" }, in sparc_tcg_init()
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| /openbmc/linux/arch/sparc/kernel/ |
| H A D | trampoline_32.S | 56 wr %g3, 0x0, %tbr
111 wr %g1, 0x0, %tbr
170 wr %g1, 0x0, %tbr
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| H A D | head_32.S | 161 rd %tbr, %g1
652 wr %g3, 0x0, %tbr
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| H A D | entry.S | 260 rd %tbr, %reg; \
1335 661: rd %tbr, %g1
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| /openbmc/u-boot/common/ |
| H A D | bedbug.c | 580 unsigned short tbr; in tbr_name() local
587 tbr = ((value >> 5) & 0x1f) | ((value & 0x1f) << 5); in tbr_name()
589 if (tbr == 268) in tbr_name()
592 else if (tbr == 269) in tbr_name()
614 int tbr; in tbr_value() local
640 tbr = ((val >> 5) & 0x1f) | ((val & 0x1f) << 5); in tbr_value()
641 return tbr; in tbr_value()
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| /openbmc/u-boot/drivers/watchdog/ |
| H A D | xilinx_tb_wdt.c | 24 u32 tbr; /* 0x8 */ member
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| /openbmc/linux/arch/powerpc/include/asm/ |
| H A D | cell-regs.h | 109 u64 tbr; /* 0x0890 */ member
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| /openbmc/linux/arch/sparc/include/asm/ |
| H A D | winmacro.h | 108 661: rd %tbr, %idreg; \
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