| /openbmc/qemu/target/riscv/ |
| H A D | translate.c | 1299 uint32_t tb_flags = ctx->base.tb->flags; in riscv_tr_init_disas_context() 1302 ctx->priv = FIELD_EX32(tb_flags, TB_FLAGS, PRIV); in riscv_tr_init_disas_context() 1303 ctx->mem_idx = FIELD_EX32(tb_flags, TB_FLAGS, MEM_IDX); in riscv_tr_init_disas_context() 1304 ctx->mstatus_fs = FIELD_EX32(tb_flags, TB_FLAGS, FS); in riscv_tr_init_disas_context() 1305 ctx->mstatus_vs = FIELD_EX32(tb_flags, TB_FLAGS, VS); in riscv_tr_init_disas_context() 1307 ctx->virt_enabled = FIELD_EX32(tb_flags, TB_FLAGS, VIRT_ENABLED); in riscv_tr_init_disas_context() 1311 ctx->vill = FIELD_EX32(tb_flags, TB_FLAGS, VILL); in riscv_tr_init_disas_context() 1312 ctx->sew = FIELD_EX32(tb_flags, TB_FLAGS, SEW); in riscv_tr_init_disas_context() 1313 ctx->lmul = sextract32(FIELD_EX32(tb_flags, TB_FLAGS, LMUL), 0, 3); in riscv_tr_init_disas_context() 1314 ctx->vta = FIELD_EX32(tb_flags, TB_FLAG in riscv_tr_init_disas_context() 1284 uint32_t tb_flags = ctx->base.tb->flags; riscv_tr_init_disas_context() local [all...] |
| /openbmc/qemu/target/microblaze/ |
| H A D | translate.c | 68 unsigned int tb_flags; member 81 if (dc->tb_flags & IMM_FLAG) { in typeb_imm() 93 if ((dc->tb_flags ^ dc->base.tb->flags) & IFLAGS_TB_MASK) { in t_sync_flags() 94 tcg_gen_movi_i32(cpu_iflags, dc->tb_flags & IFLAGS_TB_MASK); in t_sync_flags() 138 if (cond && (dc->tb_flags & MSR_EE) in trap_illegal() 153 if (cond_user && (dc->tb_flags & MSR_EE)) { in trap_userspace() 165 if (dc->tb_flags & D_FLAG) { in invalid_delay_slot() 686 if (rb && (dc->tb_flags & MSR_EE) && dc->cfg->unaligned_exceptions) { in gen_alignment_check_ea() 732 (dc->tb_flags & MSR_EE) && in do_load() 892 (dc->tb_flags in do_store() [all...] |
| /openbmc/qemu/target/sparc/ |
| H A D | cpu.h | 743 static inline bool tb_fpu_enabled(int tb_flags) 748 return tb_flags & TB_FLAG_FPU_ENABLED; in tb_fpu_enabled() 752 static inline bool tb_am_enabled(int tb_flags) 757 return tb_flags & TB_FLAG_AM_ENABLED; in tb_am_enabled() 744 tb_fpu_enabled(int tb_flags) tb_fpu_enabled() argument 753 tb_am_enabled(int tb_flags) tb_am_enabled() argument
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| /openbmc/qemu/target/hppa/ |
| H A D | translate.c | 85 uint32_t tb_flags; member 186 if (ctx->tb_flags & PSW_W) { 203 if (ctx->tb_flags & PSW_W) { 219 if (ctx->tb_flags & PSW_W) { 228 return ctx->tb_flags & PSW_W ? 0 : sp; in cmpbid_c() 517 } else if (ctx->tb_flags & TB_FLAG_SR_SAME) { in load_spr() 1540 if (ctx->tb_flags & TB_FLAG_SR_SAME) { in space_select() 1549 tcg_gen_shri_i64(tmp, base, (ctx->tb_flags & PSW_W ? 64 : 32) - 5); in space_select() 2240 ctx->tb_flags &= ~TB_FLAG_SR_SAME; in trans_mtctl() 2573 if (ctx->tb_flags in do_pxtlb() [all...] |
| /openbmc/qemu/target/arm/tcg/ |
| H A D | translate.c | 6284 CPUARMTBFlags tb_flags = arm_tbflags_from_tb(dc->base.tb); in op_addr_block_pre() 6291 dc->thumb = EX_TBFLAG_AM32(tb_flags, THUMB); in op_addr_block_pre() 6292 dc->be_data = EX_TBFLAG_ANY(tb_flags, BE_DATA) ? MO_BE : MO_LE; in op_addr_block_pre() 6293 condexec = EX_TBFLAG_AM32(tb_flags, CONDEXEC); in op_addr_block_pre() 6316 core_mmu_idx = EX_TBFLAG_ANY(tb_flags, MMUIDX); in op_addr_block_post() 6322 dc->fp_excp_el = EX_TBFLAG_ANY(tb_flags, FPEXC_EL); in op_addr_block_post() 6323 dc->align_mem = EX_TBFLAG_ANY(tb_flags, ALIGN_MEM); in op_addr_block_post() 6324 dc->pstate_il = EX_TBFLAG_ANY(tb_flags, PSTATE__IL); in op_addr_block_post() 6325 dc->fgt_active = EX_TBFLAG_ANY(tb_flags, FGT_ACTIVE); in op_addr_block_post() 6326 dc->fgt_svc = EX_TBFLAG_ANY(tb_flags, FGT_SV in op_addr_block_post() 7549 CPUARMTBFlags tb_flags = arm_tbflags_from_tb(dc->base.tb); arm_tr_init_disas_context() local 8133 CPUARMTBFlags tb_flags = arm_tbflags_from_tb(tb); arm_translate_code() local [all...] |
| H A D | translate-a64.c | 10655 CPUARMTBFlags tb_flags = arm_tbflags_from_tb(dc->base.tb); 10664 dc->be_data = EX_TBFLAG_ANY(tb_flags, BE_DATA) ? MO_BE : MO_LE; 10667 core_mmu_idx = EX_TBFLAG_ANY(tb_flags, MMUIDX); 10669 dc->tbii = EX_TBFLAG_A64(tb_flags, TBII); 10670 dc->tbid = EX_TBFLAG_A64(tb_flags, TBID); 10671 dc->tcma = EX_TBFLAG_A64(tb_flags, TCMA); 10676 dc->fp_excp_el = EX_TBFLAG_ANY(tb_flags, FPEXC_EL); 10677 dc->align_mem = EX_TBFLAG_ANY(tb_flags, ALIGN_MEM); 10678 dc->pstate_il = EX_TBFLAG_ANY(tb_flags, PSTATE__IL); 10679 dc->fgt_active = EX_TBFLAG_ANY(tb_flags, FGT_ACTIV 10113 CPUARMTBFlags tb_flags = arm_tbflags_from_tb(dc->base.tb); aarch64_tr_init_disas_context() local [all...] |
| /openbmc/qemu/target/openrisc/ |
| H A D | translate.c | 48 uint32_t tb_flags; member 73 return !(dc->tb_flags & TB_FLAGS_SM); 190 if (dc->tb_flags & SR_OVE) { in gen_ove_ov() 197 if (dc->tb_flags & SR_OVE) { in gen_ove_cyov() 204 if (dc->tb_flags & SR_OVE) { in gen_add() 1526 dc->tb_flags = dc->base.tb->flags; in openrisc_tr_init_disas_context() 1527 dc->delayed_branch = (dc->tb_flags & TB_FLAGS_DFLAG) != 0; in openrisc_tr_init_disas_context() 1543 if (dc->tb_flags & TB_FLAGS_R0_0) { in openrisc_tr_tb_start() 1592 if ((dc->tb_flags & TB_FLAGS_DFLAG ? 1 : 0) != (dc->delayed_branch != 0)) { in openrisc_tr_tb_stop()
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| /openbmc/qemu/target/rx/ |
| H A D | translate.c | 39 uint32_t tb_flags; member 244 if (FIELD_EX32(ctx->tb_flags, PSW, PM)) { in is_privileged() 333 if (FIELD_EX32(ctx->tb_flags, PSW, U)) { in move_from_cr() 349 if (FIELD_EX32(ctx->tb_flags, PSW, U)) { in move_from_cr() 387 if (FIELD_EX32(ctx->tb_flags, PSW, U)) { in move_to_cr() 403 if (FIELD_EX32(ctx->tb_flags, PSW, U)) { in move_to_cr() 2081 if (FIELD_EX32(ctx->tb_flags, PSW, U) != val) { in clrsetpsw() 2082 ctx->tb_flags = FIELD_DP32(ctx->tb_flags, PSW, U, val); in clrsetpsw() 2207 ctx->tb_flags in rx_tr_tb_start() [all...] |
| /openbmc/qemu/target/avr/ |
| H A D | translate.c | 2663 uint32_t tb_flags = ctx->base.tb->flags; in avr_tr_init_disas_context() 2670 if (tb_flags & TB_FLAGS_SKIP) { in avr_tr_init_disas_context() 2675 if (tb_flags & TB_FLAGS_FULL_ACCESS) { in avr_tr_init_disas_context() 2662 uint32_t tb_flags = ctx->base.tb->flags; avr_tr_init_disas_context() local
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| /openbmc/qemu/target/xtensa/ |
| H A D | translate.c | 1129 uint32_t tb_flags = dc->base.tb->flags; in xtensa_tr_init_disas_context() local 1133 dc->ring = tb_flags & XTENSA_TBFLAG_RING_MASK; in xtensa_tr_init_disas_context() 1134 dc->cring = (tb_flags & XTENSA_TBFLAG_EXCM) ? 0 : dc->ring; in xtensa_tr_init_disas_context() 1139 dc->debug = tb_flags & XTENSA_TBFLAG_DEBUG; in xtensa_tr_init_disas_context() 1140 dc->icount = tb_flags & XTENSA_TBFLAG_ICOUNT; in xtensa_tr_init_disas_context() 1141 dc->cpenable = (tb_flags & XTENSA_TBFLAG_CPENABLE_MASK) >> in xtensa_tr_init_disas_context() 1143 dc->window = ((tb_flags & XTENSA_TBFLAG_WINDOW_MASK) >> in xtensa_tr_init_disas_context() 1145 dc->cwoe = tb_flags & XTENSA_TBFLAG_CWOE; in xtensa_tr_init_disas_context() 1146 dc->callinc = ((tb_flags & XTENSA_TBFLAG_CALLINC_MASK) >> in xtensa_tr_init_disas_context()
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| /openbmc/qemu/target/tricore/ |
| H A D | translate.c | 8392 uint32_t tb_flags = (uint32_t)ctx->base.tb->flags; 8393 ctx->priv = FIELD_EX32(tb_flags, TB_FLAGS, PRIV); in tricore_tr_translate_insn() 8354 uint32_t tb_flags = (uint32_t)ctx->base.tb->flags; tricore_tr_init_disas_context() local
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