Searched refs:targets_secure (Results 1 – 3 of 3) sorted by relevance
/openbmc/qemu/hw/intc/ |
H A D | armv7m_nvic.c | 204 static int exc_group_prio(NVICState *s, int rawprio, bool targets_secure) in exc_group_prio() argument 213 rawprio &= nvic_gprio_mask(s, targets_secure); in exc_group_prio() 217 if (!targets_secure && in exc_group_prio() 249 bool targets_secure; in nvic_recompute_state_secure() local 256 targets_secure = true; in nvic_recompute_state_secure() 259 targets_secure = !exc_is_banked(i) && exc_targets_secure(s, i); in nvic_recompute_state_secure() 262 prio = exc_group_prio(s, vec->prio, targets_secure); in nvic_recompute_state_secure() 263 subprio = vec->prio & ~nvic_gprio_mask(s, targets_secure); in nvic_recompute_state_secure() 546 bool targets_secure; in do_armv7m_nvic_set_pending() local 553 targets_secure = banked ? secure : exc_targets_secure(s, irq); in do_armv7m_nvic_set_pending() [all …]
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H A D | trace-events | 236 …t irq, bool secure, bool targets_secure, bool derived, int en, int prio) "NVIC set pending irq %d … 239 nvic_get_pending_irq_info(int irq, bool secure) "NVIC next IRQ %d: targets_secure: %d"
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/openbmc/qemu/target/arm/tcg/ |
H A D | m_helper.c | 656 static bool arm_v7m_load_vector(ARMCPU *cpu, int exc, bool targets_secure, in arm_v7m_load_vector() argument 662 uint32_t addr = env->v7m.vecbase[targets_secure] + exc * 4; in arm_v7m_load_vector() 670 exc, targets_secure ? "secure" : "non-secure", addr); in arm_v7m_load_vector() 672 mmu_idx = arm_v7m_mmu_idx_for_secstate_and_priv(env, targets_secure, true); in arm_v7m_load_vector() 682 attrs.secure = targets_secure; in arm_v7m_load_vector() 689 targets_secure, &sattrs); in arm_v7m_load_vector() 692 } else if (!targets_secure) { in arm_v7m_load_vector() 843 bool targets_secure; in v7m_exception_taken() local 847 armv7m_nvic_get_pending_irq_info(env->nvic, &exc, &targets_secure); in v7m_exception_taken() 849 targets_secure ? "secure" : "nonsecure", exc); in v7m_exception_taken() [all …]
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