Searched refs:target_itr (Results 1 – 8 of 8) sorted by relevance
483 itr = rc->target_itr; in iavf_update_itr()507 if (rc->target_itr == IAVF_ITR_ADAPTIVE_MAX_USECS && in iavf_update_itr()508 (q_vector->rx.target_itr & IAVF_ITR_MASK) == in iavf_update_itr()515 rc->target_itr &= ~IAVF_ITR_ADAPTIVE_LATENCY; in iavf_update_itr()527 itr = rc->target_itr + IAVF_ITR_ADAPTIVE_MIN_INC; in iavf_update_itr()634 rc->target_itr = itr; in iavf_update_itr()1687 q_vector->rx.target_itr); in iavf_update_enable_itr()1688 q_vector->rx.current_itr = q_vector->rx.target_itr; in iavf_update_enable_itr()1697 q_vector->tx.target_itr); in iavf_update_enable_itr()1698 q_vector->tx.current_itr = q_vector->tx.target_itr; in iavf_update_enable_itr()[all …]
423 u16 target_itr; /* target ITR setting for ring(s) */ member
461 q_vector->rx.target_itr = ITR_TO_REG(rx_ring->itr_setting); in iavf_map_vector_to_rxq()465 q_vector->rx.current_itr = q_vector->rx.target_itr; in iavf_map_vector_to_rxq()487 q_vector->tx.target_itr = ITR_TO_REG(tx_ring->itr_setting); in iavf_map_vector_to_txq()490 q_vector->tx.target_itr >> 1); in iavf_map_vector_to_txq()491 q_vector->tx.current_itr = q_vector->tx.target_itr; in iavf_map_vector_to_txq()
807 q_vector->rx.target_itr = ITR_TO_REG(rx_ring->itr_setting); in iavf_set_itr_per_queue()810 q_vector->tx.target_itr = ITR_TO_REG(tx_ring->itr_setting); in iavf_set_itr_per_queue()
1196 itr = rc->target_itr; in i40e_update_itr()1220 if (rc->target_itr == I40E_ITR_ADAPTIVE_MAX_USECS && in i40e_update_itr()1221 (q_vector->rx.target_itr & I40E_ITR_MASK) == in i40e_update_itr()1228 rc->target_itr &= ~I40E_ITR_ADAPTIVE_LATENCY; in i40e_update_itr()1240 itr = rc->target_itr + I40E_ITR_ADAPTIVE_MIN_INC; in i40e_update_itr()1346 rc->target_itr = itr; in i40e_update_itr()2746 interval = q_vector->rx.target_itr; in i40e_update_enable_itr()2747 q_vector->rx.current_itr = q_vector->rx.target_itr; in i40e_update_enable_itr()2756 interval = q_vector->tx.target_itr; in i40e_update_enable_itr()2757 q_vector->tx.current_itr = q_vector->tx.target_itr; in i40e_update_enable_itr()[all …]
441 u16 target_itr; /* target ITR setting for ring(s) */ member
3912 q_vector->rx.target_itr = in i40e_vsi_configure_msix()3915 q_vector->rx.target_itr >> 1); in i40e_vsi_configure_msix()3916 q_vector->rx.current_itr = q_vector->rx.target_itr; in i40e_vsi_configure_msix()3919 q_vector->tx.target_itr = in i40e_vsi_configure_msix()3922 q_vector->tx.target_itr >> 1); in i40e_vsi_configure_msix()3923 q_vector->tx.current_itr = q_vector->tx.target_itr; in i40e_vsi_configure_msix()4032 q_vector->rx.target_itr = ITR_TO_REG(vsi->rx_rings[0]->itr_setting); in i40e_configure_msi_and_legacy()4033 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.target_itr >> 1); in i40e_configure_msi_and_legacy()4034 q_vector->rx.current_itr = q_vector->rx.target_itr; in i40e_configure_msi_and_legacy()4036 q_vector->tx.target_itr = ITR_TO_REG(vsi->tx_rings[0]->itr_setting); in i40e_configure_msi_and_legacy()[all …]
2988 q_vector->rx.target_itr = ITR_TO_REG(rx_ring->itr_setting); in i40e_set_itr_per_queue()2991 q_vector->tx.target_itr = ITR_TO_REG(tx_ring->itr_setting); in i40e_set_itr_per_queue()