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Searched refs:tWHR (Results 1 – 5 of 5) sorted by relevance

/openbmc/u-boot/drivers/mtd/nand/raw/
H A Dpxa3xx_nand.h15 unsigned int tWHR; /* ND_nWE high to ND_nRE low for status read */ member
H A Dsunxi_nand.c104 #define NFC_TIMING_CFG(tWB, tADL, tWHR, tRHW, tCAD) \ argument
106 (((tWHR) & 0x3) << 4) | (((tRHW) & 0x3) << 6) | \
1227 s32 tWB, tADL, tWHR, tRHW, tCAD; in sunxi_nand_chip_set_timings() local
1303 tWHR = DIV_ROUND_UP(timings->tWHR_min, min_clk_period) >> 3; in sunxi_nand_chip_set_timings()
1304 if (tWHR > 3) { in sunxi_nand_chip_set_timings()
1323 chip->timing_cfg = NFC_TIMING_CFG(tWB, tADL, tWHR, tRHW, tCAD); in sunxi_nand_chip_set_timings()
H A Dpxa3xx_nand.c435 NDTR1_tWHR(ns2cycle(t->tWHR, nand_clk)) | in pxa3xx_nand_set_timing()
/openbmc/linux/drivers/mtd/nand/raw/
H A Dsunxi_nand.c97 #define NFC_TIMING_CFG(tWB, tADL, tWHR, tRHW, tCAD) \ argument
99 (((tWHR) & 0x3) << 4) | (((tRHW) & 0x3) << 6) | \
1396 s32 tWB, tADL, tWHR, tRHW, tCAD; in sunxi_nfc_setup_interface() local
1503 tWHR = DIV_ROUND_UP(timings->tWHR_min, min_clk_period) >> 3; in sunxi_nfc_setup_interface()
1504 if (tWHR > 3) { in sunxi_nfc_setup_interface()
1526 sunxi_nand->timing_cfg = NFC_TIMING_CFG(tWB, tADL, tWHR, tRHW, tCAD); in sunxi_nfc_setup_interface()
H A Dmarvell_nand.c456 unsigned int tWHR; member
2436 nfc_tmg.tWHR = TO_CYCLES(max_t(int, sdr->tWHR_min, sdr->tCCS_min), in marvell_nfc_setup_interface()
2470 NDTR1_TWHR(nfc_tmg.tWHR) | in marvell_nfc_setup_interface()