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Searched refs:t4 (Results 1 – 25 of 33) sorted by relevance

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/openbmc/u-boot/arch/mips/mach-mt7620/
H A Dlowlevel_init.S102 li t4, ~0x0F
103 and t3, t3, t4
129 lw t4, 0x100(s2)
131 or t4, t4, t2
132 sw t4, 0x100(s2)
133 lw t4, 0x10c(s2)
138 and t4, t4, t2
139 sw t4, 0x10c(s2)
144 or t4, t4, t2
145 sw t4, 0x10c(s2)
[all …]
/openbmc/qemu/include/exec/
H A Dhelper-gen.h.inc51 #define DEF_HELPER_FLAGS_4(name, flags, ret, t1, t2, t3, t4) \
55 dh_arg_decl(t3, 3), dh_arg_decl(t4, 4)) \
60 dh_arg(t3, 3), dh_arg(t4, 4)); \
63 #define DEF_HELPER_FLAGS_5(name, flags, ret, t1, t2, t3, t4, t5) \
67 dh_arg_decl(t4, 4), dh_arg_decl(t5, 5)) \
72 dh_arg(t4, 4), dh_arg(t5, 5)); \
75 #define DEF_HELPER_FLAGS_6(name, flags, ret, t1, t2, t3, t4, t5, t6) \
79 dh_arg_decl(t4, 4), dh_arg_decl(t5, 5), dh_arg_decl(t6, 6)) \
84 dh_arg(t4, 4), dh_arg(t5, 5), dh_arg(t6, 6)); \
87 #define DEF_HELPER_FLAGS_7(name, flags, ret, t1, t2, t3, t4, t5, t6, t7)\
[all …]
H A Dhelper-proto.h.inc36 #define DEF_HELPER_FLAGS_4(name, flags, ret, t1, t2, t3, t4) \
38 dh_ctype(t4)) DEF_HELPER_ATTR;
40 #define DEF_HELPER_FLAGS_5(name, flags, ret, t1, t2, t3, t4, t5) \
42 dh_ctype(t4), dh_ctype(t5)) DEF_HELPER_ATTR;
44 #define DEF_HELPER_FLAGS_6(name, flags, ret, t1, t2, t3, t4, t5, t6) \
46 dh_ctype(t4), dh_ctype(t5), \
49 #define DEF_HELPER_FLAGS_7(name, flags, ret, t1, t2, t3, t4, t5, t6, t7) \
51 dh_ctype(t4), dh_ctype(t5), dh_ctype(t6), \
H A Dhelper-head.h.inc138 #define DEF_HELPER_4(name, ret, t1, t2, t3, t4) \
139 DEF_HELPER_FLAGS_4(name, 0, ret, t1, t2, t3, t4)
140 #define DEF_HELPER_5(name, ret, t1, t2, t3, t4, t5) \
141 DEF_HELPER_FLAGS_5(name, 0, ret, t1, t2, t3, t4, t5)
142 #define DEF_HELPER_6(name, ret, t1, t2, t3, t4, t5, t6) \
143 DEF_HELPER_FLAGS_6(name, 0, ret, t1, t2, t3, t4, t5, t6)
144 #define DEF_HELPER_7(name, ret, t1, t2, t3, t4, t5, t6, t7) \
145 DEF_HELPER_FLAGS_7(name, 0, ret, t1, t2, t3, t4, t5, t6, t7)
/openbmc/u-boot/arch/riscv/cpu/
H A Dstart.S144 la t4, __dyn_sym_start
145 add t4, t4, t6
157 add s5, t4, t0
193 mv t4, t0 /* offset of board_init_r() */
194 add t4, t4, t6 /* real address of board_init_r() */
204 jr t4 /* jump to board_init_r() */
/openbmc/qemu/target/mips/tcg/
H A Dmxu_translate.c1364 TCGv t0, t1, t2, t3, t4, t5, t6, t7; in gen_mxu_q8mul_mac() local
1371 t4 = tcg_temp_new(); in gen_mxu_q8mul_mac()
1399 tcg_gen_extract_tl(t4, t7, 0, 8); in gen_mxu_q8mul_mac()
1404 tcg_gen_mul_tl(t0, t0, t4); in gen_mxu_q8mul_mac()
1410 gen_load_mxu_gpr(t4, XRd); in gen_mxu_q8mul_mac()
1412 tcg_gen_extract_tl(t6, t4, 0, 16); in gen_mxu_q8mul_mac()
1413 tcg_gen_extract_tl(t7, t4, 16, 16); in gen_mxu_q8mul_mac()
1446 TCGv t0, t1, t2, t3, t4, t5, t6, t7; in gen_mxu_q8madl() local
1453 t4 = tcg_temp_new(); in gen_mxu_q8madl()
1472 tcg_gen_extract_tl(t4, t7, 0, 8); in gen_mxu_q8madl()
[all …]
H A Dtranslate.c11160 TCGv t4 = tcg_temp_new(); in gen_compute_compact_branch() local
11168 tcg_gen_setcond_tl(TCG_COND_NE, t4, t3, t1); in gen_compute_compact_branch()
11169 tcg_gen_or_tl(input_overflow, input_overflow, t4); in gen_compute_compact_branch()
11171 tcg_gen_add_tl(t4, t2, t3); in gen_compute_compact_branch()
11172 tcg_gen_ext32s_tl(t4, t4); in gen_compute_compact_branch()
11174 tcg_gen_xor_tl(t3, t4, t3); in gen_compute_compact_branch()
11176 tcg_gen_setcondi_tl(TCG_COND_LT, t4, t2, 0); in gen_compute_compact_branch()
11177 tcg_gen_or_tl(t4, t4, input_overflow); in gen_compute_compact_branch()
11180 tcg_gen_brcondi_tl(tcg_invert_cond(TCG_COND_NE), t4, 0, fs); in gen_compute_compact_branch()
11183 tcg_gen_brcondi_tl(tcg_invert_cond(TCG_COND_EQ), t4, 0, fs); in gen_compute_compact_branch()
/openbmc/u-boot/arch/mips/mach-ath79/ar933x/
H A Dlowlevel_init.S223 li t4, 0
226 addi t4, t4, 1
227 bgt t4, t3, 0b
/openbmc/qemu/common-user/host/mips/
H A Dsafe-syscall.inc.S69 lw t4, FRAME+24(sp)
73 sw t4, 16(sp)
/openbmc/qemu/linux-user/riscv/
H A Dtarget_syscall.h41 abi_long t4; member
/openbmc/u-boot/arch/m68k/include/asm/coldfire/
H A Data.h22 u8 t4; /* 0x07 */ member
/openbmc/u-boot/arch/mips/include/asm/
H A Dregdef.h31 #define t4 $12 macro
/openbmc/qemu/linux-headers/asm-riscv/
H A Dptrace.h54 unsigned long t4; member
/openbmc/u-boot/arch/riscv/include/asm/
H A Dptrace.h42 unsigned long t4; member
/openbmc/u-boot/board/freescale/m5253demo/
H A Dm5253demo.c125 out_8(&ata->t4, CALC_TIMING(piotms[2][3])); in ide_set_reset()
/openbmc/qemu/tests/tcg/loongarch64/system/
H A Dregdef.h26 #define t4 $r16 macro
/openbmc/u-boot/arch/nds32/cpu/n1213/
H A Dstart.S332 li $t4, 1
333 sll $t5, $t4, $t1 ! get $t5 cache line size
367 li $t4, 1
368 sll $t5, $t4, $t1 ! get $t5 cache line size
/openbmc/u-boot/board/freescale/m54455evb/
H A Dm54455evb.c142 out_8(&ata->t4, CALC_TIMING(piotms[2][3])); in ide_set_reset()
/openbmc/qemu/target/tricore/
H A Dtranslate.c534 TCGv t4 = tcg_temp_new(); in gen_madd64_d() local
538 tcg_gen_add2_tl(t3, t4, r2_low, r2_high, t1, t2); in gen_madd64_d()
540 tcg_gen_xor_tl(cpu_PSW_V, t4, r2_high); in gen_madd64_d()
546 tcg_gen_add_tl(cpu_PSW_AV, t4, t4); in gen_madd64_d()
547 tcg_gen_xor_tl(cpu_PSW_AV, t4, cpu_PSW_AV); in gen_madd64_d()
552 tcg_gen_mov_tl(ret_high, t4); in gen_madd64_d()
1128 TCGv_i64 t4 = tcg_temp_new_i64(); in gen_madd64_q() local
1139 tcg_gen_add_i64(t4, t1, t2); in gen_madd64_q()
1141 tcg_gen_xor_i64(t3, t4, t1); in gen_madd64_q()
1159 tcg_gen_extr_i64_i32(rl, rh, t4); in gen_madd64_q()
[all …]
/openbmc/openbmc/meta-openembedded/meta-oe/dynamic-layers/selinux/recipes-devtool/android-tools/android-tools/debian/
H A DAdd-riscv64-support.patch216 + fn("t4", regs_[RISCV64_REG_T4]);
419 + "sd t4, 232(%[base])\n"
/openbmc/openbmc/meta-openembedded/meta-oe/dynamic-layers/selinux/recipes-devtool/android-tools/android-tools/debian/system/core/
H A DAdd-riscv64-support.patch216 + fn("t4", regs_[RISCV64_REG_T4]);
419 + "sd t4, 232(%[base])\n"
/openbmc/qemu/tcg/
H A Dtcg.c2736 TCGTemp *t1, TCGTemp *t2, TCGTemp *t3, TCGTemp *t4) in tcg_gen_call4() argument
2738 TCGTemp *args[4] = { t1, t2, t3, t4 }; in tcg_gen_call4()
2743 TCGTemp *t2, TCGTemp *t3, TCGTemp *t4, TCGTemp *t5) in tcg_gen_call5() argument
2745 TCGTemp *args[5] = { t1, t2, t3, t4, t5 }; in tcg_gen_call5()
2751 TCGTemp *t4, TCGTemp *t5, TCGTemp *t6) in tcg_gen_call6() argument
2753 TCGTemp *args[6] = { t1, t2, t3, t4, t5, t6 }; in tcg_gen_call6()
2758 TCGTemp *t2, TCGTemp *t3, TCGTemp *t4, in tcg_gen_call7() argument
2761 TCGTemp *args[7] = { t1, t2, t3, t4, t5, t6, t7 }; in tcg_gen_call7()
/openbmc/ipmitool/
H A Dconfigure.ac637 unsigned char t4 :4;
/openbmc/qemu/target/riscv/insn_trans/
H A Dtrans_rvv.c.inc1196 TCGv_i32 t4 = tcg_temp_new_i32();
1225 tcg_gen_qemu_ld_i32(t4, addr, s->mem_idx,
1227 tcg_gen_st_i32(t4, tcg_env, vreg_ofs(s, vd) + i);
1229 tcg_gen_ld_i32(t4, tcg_env, vreg_ofs(s, vd) + i);
1230 tcg_gen_qemu_st_i32(t4, addr, s->mem_idx,
/openbmc/qemu/tcg/i386/
H A Dtcg-target.c.inc4486 TCGv_vec t1, t2, t3, t4, zero;
4522 t4 = tcg_temp_new_vec(type);
4531 tcgv_vec_arg(t4), tcgv_vec_arg(zero), tcgv_vec_arg(v2));
4533 tcg_gen_mul_vec(MO_16, t3, t3, t4);
4541 tcg_temp_free_vec(t4);

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