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Searched refs:sys_clcd (Results 1 – 1 of 1) sorted by relevance

/openbmc/qemu/hw/misc/
H A Darm_sysctl.c47 uint32_t sys_clcd; member
72 VMSTATE_UINT32_V(sys_clcd, arm_sysctl_state, 3),
120 s->sys_clcd = 0; in arm_sysctl_reset()
123 s->sys_clcd = 0x1f00; in arm_sysctl_reset()
172 return s->sys_clcd; in arm_sysctl_read()
468 s->sys_clcd &= 0x3f00; in arm_sysctl_write()
469 s->sys_clcd |= val & ~0x3f00; in arm_sysctl_write()
476 s->sys_clcd &= 0x3f00; in arm_sysctl_write()
477 s->sys_clcd |= val & ~0x3f00; in arm_sysctl_write()
484 s->sys_clcd &= (1 << 7); in arm_sysctl_write()
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