| /openbmc/linux/tools/testing/selftests/arm64/abi/ |
| H A D | syscall-abi.c | 67 uint64_t svcr) in setup_gpr() argument
74 static int check_gpr(struct syscall_cfg *cfg, int sve_vl, int sme_vl, uint64_t svcr) in check_gpr() argument
100 uint64_t svcr) in setup_fpr() argument
107 uint64_t svcr) in check_fpr() argument
112 if (!sve_vl && !(svcr & SVCR_SM_MASK)) { in check_fpr()
128 if (svcr & SVCR_SM_MASK) { in check_fpr()
146 uint64_t svcr) in setup_z() argument
153 uint64_t svcr) in check_z() argument
166 if (svcr & SVCR_SM_MASK) { in check_z()
205 uint64_t svcr) in setup_p() argument
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| /openbmc/qemu/linux-user/aarch64/ |
| H A D | signal.c | 204 if (FIELD_EX64(env->svcr, SVCR, SM)) { in target_setup_sve_record()
301 int size, int *svcr) in target_restore_sve_record() argument
339 *svcr = FIELD_DP64(*svcr, SVCR, SM, sm); in target_restore_sve_record()
369 int size, int *svcr) in target_restore_za_record() argument
395 *svcr = FIELD_DP64(*svcr, SVCR, ZA, 1); in target_restore_za_record()
417 int svcr = 0; in target_restore_sigframe() local
494 if (sve && !target_restore_sve_record(env, sve, sve_size, &svcr)) { in target_restore_sigframe()
497 if (za && !target_restore_za_record(env, za, za_size, &svcr)) { in target_restore_sigframe()
500 if (env->svcr != svcr) { in target_restore_sigframe()
501 env->svcr = svcr; in target_restore_sigframe()
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| H A D | target_prctl.h | 100 env->svcr = FIELD_DP64(env->svcr, SVCR, ZA, 0); in do_prctl_sme_set_vl()
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| /openbmc/linux/arch/arm64/kernel/ |
| H A D | fpsimd.c | 429 write_sysreg_s(current->thread.svcr, SYS_SVCR); in task_fpsimd_load()
489 u64 *svcr = last->svcr; in fpsimd_save() local
491 *svcr = read_sysreg_s(SYS_SVCR); in fpsimd_save()
493 if (*svcr & SVCR_ZA_MASK) in fpsimd_save()
498 if (*svcr & SVCR_SM_MASK) { in fpsimd_save()
905 !(task->thread.svcr & (SVCR_SM_MASK | SVCR_ZA_MASK))) { in vec_set_vector_length()
911 task->thread.svcr &= ~(SVCR_SM_MASK | in vec_set_vector_length()
1674 current->thread.svcr = 0; in fpsimd_flush_thread()
1750 last->svcr = ¤t->thread.svcr; in fpsimd_bind_task_to_cpu()
2000 u64 svcr; in __efi_fpsimd_begin() local
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| H A D | signal.c | 310 current->thread.svcr &= ~SVCR_SM_MASK; in restore_sve_fpsimd_context()
344 current->thread.svcr |= SVCR_SM_MASK; in restore_sve_fpsimd_context()
459 current->thread.svcr &= ~SVCR_ZA_MASK; in restore_za_context()
480 current->thread.svcr &= ~SVCR_ZA_MASK; in restore_za_context()
493 current->thread.svcr |= SVCR_ZA_MASK; in restore_za_context()
1111 if (current->thread.svcr & SVCR_SM_MASK) { in setup_return()
1117 current->thread.svcr &= ~(SVCR_ZA_MASK | in setup_return()
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| H A D | ptrace.c | 873 u64 old_svcr = target->thread.svcr; in sve_set_common()
877 target->thread.svcr &= ~SVCR_SM_MASK; in sve_set_common()
880 target->thread.svcr |= SVCR_SM_MASK; in sve_set_common()
899 if (target->thread.svcr != old_svcr) in sve_set_common()
1117 target->thread.svcr &= ~SVCR_ZA_MASK; in za_set()
1142 target->thread.svcr |= SVCR_ZA_MASK; in za_set()
1194 target->thread.svcr |= SVCR_ZA_MASK; in zt_set()
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| /openbmc/linux/arch/arm64/include/asm/ |
| H A D | fpsimd.h | 65 u64 *svcr; member
79 return system_supports_sme() && (thread->svcr & SVCR_SM_MASK); in thread_sm_enabled()
84 return system_supports_sme() && (thread->svcr & SVCR_ZA_MASK); in thread_za_enabled()
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| H A D | processor.h | 180 u64 svcr; member
202 if (system_supports_sme() && (thread->svcr & SVCR_SM_MASK)) in thread_get_cur_vl()
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| H A D | kvm_host.h | 481 u64 svcr; member
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| /openbmc/linux/arch/arm64/kvm/ |
| H A D | fpsimd.c | 155 fp_state.svcr = &vcpu->arch.svcr; in kvm_arch_vcpu_ctxsync_fp()
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| /openbmc/qemu/target/arm/tcg/ |
| H A D | hflags.c | 193 && FIELD_EX64(env->svcr, SVCR, SM) in rebuild_hflags_a32()
243 bool sm = FIELD_EX64(env->svcr, SVCR, SM); in rebuild_hflags_a64()
259 DP_TBFLAG_A64(flags, PSTATE_ZA, FIELD_EX64(env->svcr, SVCR, ZA)); in rebuild_hflags_a64()
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| /openbmc/qemu/target/arm/ |
| H A D | cpu.c | 1262 env->svcr, in aarch64_cpu_dump_state()
1263 (FIELD_EX64(env->svcr, SVCR, ZA) ? 'Z' : '-'), in aarch64_cpu_dump_state()
1264 (FIELD_EX64(env->svcr, SVCR, SM) ? 'S' : '-')); in aarch64_cpu_dump_state()
1284 if (cpu_isar_feature(aa64_sme, cpu) && FIELD_EX64(env->svcr, SVCR, SM)) { in aarch64_cpu_dump_state()
1363 FIELD_EX64(env->svcr, SVCR, ZA) && in aarch64_cpu_dump_state()
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| H A D | machine.c | 309 return FIELD_EX64(cpu->env.svcr, SVCR, ZA); in za_needed()
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| H A D | cpu.h | 261 uint64_t svcr; /* PSTATE.{SM,ZA} in the bits they are in SVCR */ member
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| H A D | helper.c | 7272 return sve_vqm1_for_el_sm(env, el, FIELD_EX64(env->svcr, SVCR, SM)); in sve_vqm1_for_el()
7370 uint64_t change = (env->svcr ^ new) & mask; in aarch64_set_svcr()
7375 env->svcr ^= change; in aarch64_set_svcr()
7437 .fieldoffset = offsetof(CPUARMState, svcr),
12838 sm = FIELD_EX64(env->svcr, SVCR, SM); in aarch64_sve_change_el()
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