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/openbmc/linux/Documentation/litmus-tests/atomic/
H A DAtomic-RMW+mb__after_atomic-is-stronger-than-acquire.litmus1 C Atomic-RMW+mb__after_atomic-is-stronger-than-acquire
7 * stronger than a normal acquire: both the read and write parts of
/openbmc/linux/Documentation/litmus-tests/
H A DREADME15 Atomic-RMW+mb__after_atomic-is-stronger-than-acquire.litmus
17 stronger than a normal acquire: both the read and write parts of
/openbmc/linux/Documentation/
H A Datomic_t.txt225 is a 'typical' RELEASE pattern, the barrier is strictly stronger than
234 strictly stronger than ACQUIRE. As illustrated:
236 C Atomic-RMW+mb__after_atomic-is-stronger-than-acquire
/openbmc/linux/Documentation/scheduler/
H A Dsched-nice-design.rst17 much stronger than they were before in 2.4 (and people were happy about
111 automatically: stronger negative nice levels are an automatic
H A Dsched-design-CFS.rst108 The CFS scheduler has a much stronger handling of nice levels and SCHED_BATCH
/openbmc/linux/Documentation/devicetree/bindings/mtd/
H A Dfsmc-nand.txt37 Can support 1-bit HW ECC (default) or if stronger correction is required,
/openbmc/openbmc/poky/meta/recipes-extended/unzip/unzip/
H A Dfix-security-format.patch33 if (!error_in_archive) /* don't overwrite stronger error */
/openbmc/linux/tools/memory-model/Documentation/
H A Drecipes.txt45 use READ_ONCE() and WRITE_ONCE() or stronger to prevent load/store
68 stronger than "Any CPU holding a given lock sees all changes made by any
344 Of course, given that smp_mb() is strictly stronger than either smp_wmb()
434 The ordering in this example is stronger than it needs to be. For
H A Dlocking.txt21 Note that this statement is a bit stronger than "Any CPU holding a
H A Dordering.txt415 A control dependency extends from a marked load (READ_ONCE() or stronger)
416 through an "if" condition to a marked store (WRITE_ONCE() or stronger)
/openbmc/linux/Documentation/process/
H A Dkernel-enforcement-statement.rst50 be stronger.
H A D1.Intro.rst168 are heard, but active developers have a stronger voice - and the ability
/openbmc/linux/Documentation/driver-api/early-userspace/
H A Dbuffer-format.rst84 significantly stronger integrity check), however, this is the
/openbmc/qemu/docs/system/
H A Dcpu-models-x86.rst.inc140 Required to enable stronger Spectre v2 (CVE-2017-5715) fixes in some
276 Required to enable stronger Spectre v2 (CVE-2017-5715) fixes in some
/openbmc/docs/designs/
H A Dredfish-resource-supplement-for-pfr.md29 and component/device suppliers, to build stronger security mechanisms into
/openbmc/linux/fs/smb/client/
H A DKconfig76 man-in-the-middle attacks and stronger crypto hashes, so the use
/openbmc/qemu/docs/devel/
H A Datomics.rst54 case, ``qemu/atomic.h`` will reduce stronger memory barriers to simple
194 stronger than both a read and a write memory barrier; it implies both
H A Dmulti-thread-tcg.rst294 - host systems with stronger implied guarantees can skip some barriers
/openbmc/linux/Documentation/admin-guide/media/
H A Dfaq.rst154 usually TV cards need stronger signals than TV sets, and are more
/openbmc/linux/drivers/net/wireless/intel/iwlwifi/mvm/
H A Drs.c1851 int *weaker, int *stronger) in rs_get_adjacent_txp() argument
1857 *stronger = index - IWL_MVM_RS_TPC_TX_POWER_STEP; in rs_get_adjacent_txp()
1858 if (*stronger < 0) in rs_get_adjacent_txp()
1859 *stronger = TPC_INVALID; in rs_get_adjacent_txp()
/openbmc/docs/architecture/code-update/
H A Demmc-storage-design.md117 and data in the filesystem, and therefore provides stronger guarantees on the
/openbmc/linux/Documentation/mm/
H A Dmultigen_lru.rst58 The protection of the former channel is by design stronger because:
/openbmc/linux/Documentation/networking/dsa/
H A Dconfiguration.rst349 Since kernel v5.14, DSA has gained stronger integration with the bridge's
/openbmc/linux/Documentation/driver-api/
H A Ddevice-io.rst295 memory (e.g. I/O registers). Other modes can offer weaker or stronger
/openbmc/linux/Documentation/bpf/
H A Dkfuncs.rst411 significant value provide stronger incentives for maintainers to invest the

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