Searched refs:ss_status (Results 1 – 5 of 5) sorted by relevance
89 CHECKREGIDX(TRCSSCSRn(0), ss_status, idx, off_mask); in etm4_cfg_map_reg_offset()
91 (drvdata->config.ss_status[n] & TRCSSCSRn_PC); in etm4x_sspcicrn_present()478 config->ss_status[i] &= ~TRCSSCSRn_STATUS; in etm4_enable_hw()480 etm4x_relaxed_write32(csa, config->ss_status[i], TRCSSCSRn(i)); in etm4_enable_hw()912 config->ss_status[i] = in etm4_disable_hw()1277 drvdata->config.ss_status[i] = in etm4_init_arch_data()
846 u32 ss_status[ETM_MAX_SS_CMP]; member915 u32 ss_status[ETM_MAX_SS_CMP]; member
1801 config->ss_status[idx] &= ~TRCSSCSRn_STATUS; in sshot_ctrl_store()1815 val = config->ss_status[config->ss_idx]; in sshot_status_show()1851 config->ss_status[idx] &= ~TRCSSCSRn_STATUS; in sshot_pe_ctrl_store()
366 u32 ss_status; /* 2U */ member