| /openbmc/linux/arch/parisc/kernel/ |
| H A D | pacache.S | 79 mtsp %r20, %sr1
85 pitlbe %r0(%sr1, %r28)
94 mtsp %r20, %sr1
123 mtsp %r20, %sr1
129 pdtlbe %r0(%sr1, %r28)
138 mtsp %r20, %sr1
183 3: pdtlbe %r0(%sr1,%r0)
200 mtsp %r0, %sr1
216 fice,m %arg1(%sr1, %arg0)
261 mtsp %r0, %sr1
[all …]
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| H A D | entry.S | 1195 mtsp spc,%sr1
1197 idtlba pte,(%sr1,va)
1229 mtsp spc,%sr1
1231 idtlba pte,(%sr1,va)
1393 mtsp spc,%sr1
1395 iitlba pte,(%sr1,va)
1417 mtsp spc,%sr1
1419 iitlba pte,(%sr1,va)
1525 mtsp spc,%sr1
1527 idtlba pte,(%sr1,va)
[all …]
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| H A D | kgdb.c | 73 gr->sr1 = regs->sr[1]; in pt_regs_to_gdb_regs()
104 regs->sr[1] = gr->sr1; in gdb_regs_to_pt_regs()
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| H A D | head.S | 284 mtsp %r0,%sr1
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| /openbmc/qemu/hw/audio/ |
| H A D | pl041.c | 163 s->regs.sr1 = TXFE | RXFE | TXHE; in pl041_reset()
239 s->regs.sr1 &= ~(TXUNDERRUN | TXFE); in pl041_fifo1_write()
243 s->regs.sr1 &= ~TXHE; in pl041_fifo1_write()
247 s->regs.sr1 |= TXFF; in pl041_fifo1_write()
250 DBG_L2("fifo1_push sr1 = 0x%08x\n", s->regs.sr1); in pl041_fifo1_write()
290 s->regs.sr1 &= ~TXFF; in pl041_fifo1_transmit()
293 s->regs.sr1 |= TXHE; in pl041_fifo1_transmit()
308 if (s->regs.sr1 & TXUNDERRUN) { in pl041_isr1_update()
314 if (s->regs.sr1 & TXHE) { in pl041_isr1_update()
320 if (!(s->regs.sr1 & TXBUSY) && (s->regs.sr1 & TXFE)) { in pl041_isr1_update()
[all …]
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| H A D | pl041.hx | 16 REGISTER( sr1, 0x08 )
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| /openbmc/linux/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ |
| H A D | ramnv40.c | 75 u8 sr1[2]; in nv40_ram_prog() local
85 sr1[i] = nvkm_rd08(device, 0x0c03c5 + (i * 0x2000)); in nv40_ram_prog()
86 if (!(sr1[i] & 0x20)) in nv40_ram_prog()
112 nvkm_wr08(device, 0x0c03c5 + (i * 0x2000), sr1[i] | 0x20); in nv40_ram_prog()
172 nvkm_wr08(device, 0x0c03c5 + (i * 0x2000), sr1[i]); in nv40_ram_prog()
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| /openbmc/qemu/tests/tcg/xtensa/ |
| H A D | fpu.h | 103 .macro test_op1 op, fr0, fr1, v0, r0, r1, r2, r3, sr0, sr1, sr2, sr3
105 test_op1_ex \op, \fr0, \fr1, \v0, 1, \r1, \sr1
110 .macro test_op2 op, fr0, fr1, fr2, v0, v1, r0, r1, r2, r3, sr0, sr1, sr2, sr3
112 test_op2_ex \op, \fr0, \fr1, \fr2, \v0, \v1, 1, \r1, \sr1
117 .macro test_op3 op, fr0, fr1, fr2, fr3, v0, v1, v2, r0, r1, r2, r3, sr0, sr1, sr2, sr3
119 test_op3_ex \op, \fr0, \fr1, \fr2, \fr3, \v0, \v1, \v2, 1, \r1, \sr1
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| /openbmc/linux/arch/powerpc/platforms/ps3/ |
| H A D | spu.c | 90 u64 sr1; member
351 spu_pdata(spu)->cache.sr1 = 0x33; in ps3_create_spu()
532 static void mfc_sr1_set(struct spu *spu, u64 sr1) in mfc_sr1_set() argument
539 BUG_ON((sr1 & allowed) != (spu_pdata(spu)->cache.sr1 & allowed)); in mfc_sr1_set()
541 spu_pdata(spu)->cache.sr1 = sr1; in mfc_sr1_set()
545 spu_pdata(spu)->cache.sr1); in mfc_sr1_set()
550 return spu_pdata(spu)->cache.sr1; in mfc_sr1_get()
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| /openbmc/linux/drivers/gpu/drm/i915/display/ |
| H A D | intel_vga.c | 33 u8 sr1; in intel_vga_disable() local
41 sr1 = inb(VGA_SEQ_D); in intel_vga_disable()
42 outb(sr1 | VGA_SR01_SCREEN_OFF, VGA_SEQ_D); in intel_vga_disable()
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| /openbmc/linux/arch/powerpc/platforms/cell/spufs/ |
| H A D | run.c | 86 u64 sr1; in spu_setup_isolated() local
125 sr1 = spu_mfc_sr1_get(ctx->spu); in spu_setup_isolated()
126 sr1 &= ~MFC_STATE1_PROBLEM_STATE_MASK; in spu_setup_isolated()
127 spu_mfc_sr1_set(ctx->spu, sr1); in spu_setup_isolated()
169 sr1 |= MFC_STATE1_PROBLEM_STATE_MASK; in spu_setup_isolated()
170 spu_mfc_sr1_set(ctx->spu, sr1); in spu_setup_isolated()
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| H A D | hw_ops.c | 228 u64 sr1; in spu_hw_master_start() local
231 sr1 = spu_mfc_sr1_get(spu) | MFC_STATE1_MASTER_RUN_CONTROL_MASK; in spu_hw_master_start()
232 spu_mfc_sr1_set(spu, sr1); in spu_hw_master_start()
239 u64 sr1; in spu_hw_master_stop() local
242 sr1 = spu_mfc_sr1_get(spu) & ~MFC_STATE1_MASTER_RUN_CONTROL_MASK; in spu_hw_master_stop()
243 spu_mfc_sr1_set(spu, sr1); in spu_hw_master_stop()
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| H A D | backing_ops.c | 298 u64 sr1; in spu_backing_master_start() local
301 sr1 = csa->priv1.mfc_sr1_RW | MFC_STATE1_MASTER_RUN_CONTROL_MASK; in spu_backing_master_start()
302 csa->priv1.mfc_sr1_RW = sr1; in spu_backing_master_start()
309 u64 sr1; in spu_backing_master_stop() local
312 sr1 = csa->priv1.mfc_sr1_RW & ~MFC_STATE1_MASTER_RUN_CONTROL_MASK; in spu_backing_master_stop()
313 csa->priv1.mfc_sr1_RW = sr1; in spu_backing_master_stop()
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| /openbmc/linux/arch/powerpc/include/asm/ |
| H A D | spu_priv1.h | 31 void (*mfc_sr1_set) (struct spu *spu, u64 sr1);
111 spu_mfc_sr1_set (struct spu *spu, u64 sr1) in spu_mfc_sr1_set() argument
113 spu_priv1_ops->mfc_sr1_set(spu, sr1); in spu_mfc_sr1_set()
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| /openbmc/linux/arch/powerpc/platforms/cell/ |
| H A D | spu_priv1_mmio.c | 100 static void mfc_sr1_set(struct spu *spu, u64 sr1) in mfc_sr1_set() argument
102 out_be64(&spu->priv1->mfc_sr1_RW, sr1); in mfc_sr1_set()
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| /openbmc/linux/arch/parisc/include/asm/ |
| H A D | kgdb.h | 46 unsigned long sr1; member
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| H A D | asmregs.h | 70 sr1: .reg %sr1
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| H A D | assembly.h | 464 SAVE_SP (%sr1, PT_SR1 (\regs))
503 REST_SP (%sr1, PT_SR1 (\regs))
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| /openbmc/linux/drivers/gpu/drm/gma500/ |
| H A D | cdv_device.c | 25 u8 sr1; in cdv_disable_vga() local
31 sr1 = inb(VGA_SR_DATA); in cdv_disable_vga()
32 outb(sr1 | 1<<5, VGA_SR_DATA); in cdv_disable_vga()
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| /openbmc/linux/drivers/mtd/devices/ |
| H A D | st_spi_fsm.c | 1393 uint8_t sr1, cr1, dyb; in stfsm_s25fl_config() local
1461 stfsm_read_status(fsm, SPINOR_OP_RDSR, &sr1, 1); in stfsm_s25fl_config()
1462 sta_wr = ((uint16_t)cr1 << 8) | sr1; in stfsm_s25fl_config()
1478 uint8_t sr1, sr2; in stfsm_w25q_config() local
1505 stfsm_read_status(fsm, SPINOR_OP_RDSR, &sr1, 1); in stfsm_w25q_config()
1506 sr_wr = ((uint16_t)sr2 << 8) | sr1; in stfsm_w25q_config()
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| /openbmc/linux/drivers/mtd/spi-nor/ |
| H A D | core.c | 830 static int spi_nor_write_sr1_and_check(struct spi_nor *nor, u8 sr1) in spi_nor_write_sr1_and_check() argument
834 nor->bouncebuf[0] = sr1; in spi_nor_write_sr1_and_check()
844 if (nor->bouncebuf[0] != sr1) { in spi_nor_write_sr1_and_check()
862 static int spi_nor_write_16bit_sr_and_check(struct spi_nor *nor, u8 sr1) in spi_nor_write_16bit_sr_and_check() argument
895 sr_cr[0] = sr1; in spi_nor_write_16bit_sr_and_check()
905 if (sr1 != sr_cr[0]) { in spi_nor_write_16bit_sr_and_check()
989 int spi_nor_write_sr_and_check(struct spi_nor *nor, u8 sr1) in spi_nor_write_sr_and_check() argument
992 return spi_nor_write_16bit_sr_and_check(nor, sr1); in spi_nor_write_sr_and_check()
994 return spi_nor_write_sr1_and_check(nor, sr1); in spi_nor_write_sr_and_check()
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| /openbmc/linux/kernel/locking/ |
| H A D | lockdep_proc.c | 202 sr1 = debug_atomic_read(redundant_softirqs_on), in lockdep_stats_debug_show() local
226 seq_printf(m, " redundant softirq ons: %11llu\n", sr1); in lockdep_stats_debug_show()
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| /openbmc/u-boot/drivers/serial/ |
| H A D | serial_mxc.c | 128 u32 sr1; member
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| /openbmc/linux/arch/parisc/lib/ |
| H A D | lusercopy.S | 97 srcspc = sr1
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| /openbmc/linux/arch/arm/boot/dts/ti/omap/ |
| H A D | omap34xx-omap36xx-clocks.dtsi | 165 sr1_fck: clock-sr1-fck {
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