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Searched refs:sparc_config (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/arch/sparc/kernel/
H A Dtime_32.c92 sparc_config.clear_clock_irq(); in timer_interrupt()
95 sparc_config.clear_clock_irq(); in timer_interrupt()
146 offset += sparc_config.cs_period; in sbus_cycles_offset()
160 offset = sparc_config.get_cycles_offset(); in timer_cs_read()
164 cycles *= sparc_config.cs_period; in timer_cs_read()
189 sparc_config.load_profile_irq(cpu, 0); in percpu_ce_shutdown()
207 sparc_config.load_profile_irq(cpu, next); in percpu_ce_set_next_event()
216 if (sparc_config.features & FEAT_L14_ONESHOT) in register_percpu_ce()
330 if (sparc_config.features & FEAT_L10_CLOCKEVENT) in sparc32_late_time_init()
342 sparc_config.init_timers(); in sbus_time_init()
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H A Dsun4m_irq.c389 sparc_config.cs_period = SBUS_CLOCK_RATE * 2; /* 2 seconds */ in sun4m_init_timers()
390 sparc_config.features |= FEAT_L14_ONESHOT; in sun4m_init_timers()
392 sparc_config.cs_period = SBUS_CLOCK_RATE / HZ; /* 1/HZ sec */ in sun4m_init_timers()
393 sparc_config.features |= FEAT_L10_CLOCKEVENT; in sun4m_init_timers()
395 sparc_config.features |= FEAT_L10_CLOCKSOURCE; in sun4m_init_timers()
396 sbus_writel(timer_value(sparc_config.cs_period), in sun4m_init_timers()
470 sparc_config.init_timers = sun4m_init_timers; in sun4m_init_IRQ()
471 sparc_config.build_device_irq = sun4m_build_device_irq; in sun4m_init_IRQ()
472 sparc_config.clock_rate = SBUS_CLOCK_RATE; in sun4m_init_IRQ()
473 sparc_config.clear_clock_irq = sun4m_clear_clock_irq; in sun4m_init_IRQ()
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H A Dsun4d_irq.c462 sparc_config.cs_period = SBUS_CLOCK_RATE * 2; /* 2 seconds */ in sun4d_init_timers()
464 sparc_config.cs_period = SBUS_CLOCK_RATE / HZ; /* 1/HZ sec */ in sun4d_init_timers()
465 sparc_config.features |= FEAT_L10_CLOCKEVENT; in sun4d_init_timers()
467 sparc_config.features |= FEAT_L10_CLOCKSOURCE; in sun4d_init_timers()
468 sbus_writel(timer_value(sparc_config.cs_period), in sun4d_init_timers()
512 sparc_config.init_timers = sun4d_init_timers; in sun4d_init_IRQ()
513 sparc_config.build_device_irq = sun4d_build_device_irq; in sun4d_init_IRQ()
514 sparc_config.clock_rate = SBUS_CLOCK_RATE; in sun4d_init_IRQ()
515 sparc_config.clear_clock_irq = sun4d_clear_clock_irq; in sun4d_init_IRQ()
516 sparc_config.load_profile_irq = sun4d_load_profile_irq; in sun4d_init_IRQ()
H A Dirq.h57 struct sparc_config { struct
77 extern struct sparc_config sparc_config; argument
H A Dleon_kernel.c315 sparc_config.get_cycles_offset = leon_cycles_offset; in leon_init_timers()
316 sparc_config.cs_period = 1000000 / HZ; in leon_init_timers()
317 sparc_config.features |= FEAT_L10_CLOCKSOURCE; in leon_init_timers()
320 sparc_config.features |= FEAT_L10_CLOCKEVENT; in leon_init_timers()
504 sparc_config.init_timers = leon_init_timers; in leon_init_IRQ()
505 sparc_config.build_device_irq = _leon_build_device_irq; in leon_init_IRQ()
506 sparc_config.clock_rate = 1000000; in leon_init_IRQ()
507 sparc_config.clear_clock_irq = leon_clear_clock_irq; in leon_init_IRQ()
508 sparc_config.load_profile_irq = leon_load_profile_irq; in leon_init_IRQ()
H A Dpcic.c714 sparc_config.clock_rate = SBUS_CLOCK_RATE / HZ; in pci_time_init()
715 sparc_config.features |= FEAT_L10_CLOCKEVENT; in pci_time_init()
717 sparc_config.features |= FEAT_L10_CLOCKSOURCE; in pci_time_init()
718 sparc_config.get_cycles_offset = pcic_cycles_offset; in pci_time_init()
835 sparc_config.build_device_irq = pcic_build_device_irq; in sun4m_pci_init_IRQ()
836 sparc_config.clear_clock_irq = pcic_clear_clock_irq; in sun4m_pci_init_IRQ()
837 sparc_config.load_profile_irq = pcic_load_profile_irq; in sun4m_pci_init_IRQ()
H A Dirq_32.c29 struct sparc_config sparc_config; variable
H A Dof_device_32.c361 sparc_config.build_device_irq(op, intr[i].pri); in scan_one_device()
370 sparc_config.build_device_irq(op, irq[i]); in scan_one_device()
H A Dsun4m_smp.c256 sparc_config.load_profile_irq(cpu, 0); /* Is this needless? */ in smp4m_percpu_timer_interrupt()