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Searched refs:smc_state (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/drivers/gpu/drm/radeon/
H A Dni_dpm.c2456 NISLANDS_SMC_SWSTATE *smc_state) in ni_populate_power_containment_values() argument
2499 smc_state->levels[0].dpm2.MaxPS = 0; in ni_populate_power_containment_values()
2527 smc_state->levels[i].dpm2.MaxPS = in ni_populate_power_containment_values()
2532 smc_state->levels[i].stateFlags |= in ni_populate_power_containment_values()
2641 smc_state->levelCount = 0; in ni_convert_power_state_to_smc()
2648 &smc_state->levels[i]); in ni_convert_power_state_to_smc()
2666 smc_state->levels[i].ACIndex = 0; in ni_convert_power_state_to_smc()
2668 smc_state->levelCount++; in ni_convert_power_state_to_smc()
2693 NISLANDS_SMC_SWSTATE *smc_state; in ni_upload_sw_state() local
2699 if (smc_state == NULL) in ni_upload_sw_state()
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H A Dsi_dpm.c2268 SISLANDS_SMC_SWSTATE *smc_state) in si_populate_power_containment_values() argument
2296 smc_state->levels[0].dpm2.MaxPS = 0; in si_populate_power_containment_values()
2362 SISLANDS_SMC_SWSTATE *smc_state) in si_populate_sq_ramping_values() argument
5069 SISLANDS_SMC_SWSTATE *smc_state) in si_populate_smc_t() argument
5172 SISLANDS_SMC_SWSTATE *smc_state) in si_convert_power_state_to_smc() argument
5198 smc_state->levelCount = 0; in si_convert_power_state_to_smc()
5210 &smc_state->levels[i]); in si_convert_power_state_to_smc()
5228 smc_state->levels[i].ACIndex = 0; in si_convert_power_state_to_smc()
5230 smc_state->levelCount++; in si_convert_power_state_to_smc()
5262 memset(smc_state, 0, state_size); in si_upload_sw_state()
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H A Dcypress_dpm.c767 RV770_SMC_SWSTATE *smc_state) in cypress_convert_power_state_to_smc() argument
774 smc_state->flags |= PPSMC_SWSTATE_FLAG_DC; in cypress_convert_power_state_to_smc()
778 &smc_state->levels[0], in cypress_convert_power_state_to_smc()
785 &smc_state->levels[1], in cypress_convert_power_state_to_smc()
792 &smc_state->levels[2], in cypress_convert_power_state_to_smc()
802 smc_state->levels[0].ACIndex = 2; in cypress_convert_power_state_to_smc()
803 smc_state->levels[1].ACIndex = 3; in cypress_convert_power_state_to_smc()
804 smc_state->levels[2].ACIndex = 4; in cypress_convert_power_state_to_smc()
806 smc_state->levels[0].ACIndex = 0; in cypress_convert_power_state_to_smc()
807 smc_state->levels[1].ACIndex = 0; in cypress_convert_power_state_to_smc()
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H A Drv770_dpm.c259 RV770_SMC_SWSTATE *smc_state) in rv770_populate_smc_t() argument
291 smc_state->levels[i].aT = cpu_to_be32(a_t); in rv770_populate_smc_t()
305 RV770_SMC_SWSTATE *smc_state) in rv770_populate_smc_sp() argument
311 smc_state->levels[i].bSP = cpu_to_be32(pi->dsp); in rv770_populate_smc_sp()
677 RV770_SMC_SWSTATE *smc_state) in rv770_convert_power_state_to_smc() argument
683 smc_state->flags |= PPSMC_SWSTATE_FLAG_DC; in rv770_convert_power_state_to_smc()
687 &smc_state->levels[0], in rv770_convert_power_state_to_smc()
694 &smc_state->levels[1], in rv770_convert_power_state_to_smc()
701 &smc_state->levels[2], in rv770_convert_power_state_to_smc()
706 smc_state->levels[0].arbValue = MC_CG_ARB_FREQ_F1; in rv770_convert_power_state_to_smc()
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H A Drv770_dpm.h231 RV770_SMC_SWSTATE *smc_state);
234 RV770_SMC_SWSTATE *smc_state);
/openbmc/linux/drivers/gpu/drm/amd/pm/legacy-dpm/
H A Dsi_dpm.c2382 SISLANDS_SMC_SWSTATE *smc_state) in si_populate_power_containment_values() argument
2410 smc_state->levels[0].dpm2.MaxPS = 0; in si_populate_power_containment_values()
2475 SISLANDS_SMC_SWSTATE *smc_state) in si_populate_sq_ramping_values() argument
5571 SISLANDS_SMC_SWSTATE *smc_state) in si_populate_smc_t() argument
5674 SISLANDS_SMC_SWSTATE *smc_state) in si_convert_power_state_to_smc() argument
5700 smc_state->levelCount = 0; in si_convert_power_state_to_smc()
5712 &smc_state->levels[i]); in si_convert_power_state_to_smc()
5730 smc_state->levels[i].ACIndex = 0; in si_convert_power_state_to_smc()
5732 smc_state->levelCount++; in si_convert_power_state_to_smc()
5763 memset(smc_state, 0, state_size); in si_upload_sw_state()
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/openbmc/linux/net/smc/
H A Dsmc.h44 enum smc_state { /* possible states of an SMC socket */ enum