| /openbmc/u-boot/arch/m68k/cpu/mcf530x/ |
| H A D | cpu_init.c | 106 sim_t *sim = (sim_t *)(MMAP_SIM); in cpu_init_f() local
108 out_8(&sim->sypcr, 0x00); in cpu_init_f()
109 out_8(&sim->swivr, 0x0f); in cpu_init_f()
110 out_8(&sim->swsr, 0x00); in cpu_init_f()
111 out_8(&sim->mpark, 0x00); in cpu_init_f()
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| H A D | cpu.c | 14 sim_t *sim = (sim_t *)(MMAP_SIM); in do_reset() local
17 out_8(&sim->sypcr, SYPCR_SWE | SYPCR_SWRI); in do_reset()
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| /openbmc/u-boot/board/sysam/amcore/ |
| H A D | amcore.c | 21 sim_t *sim = (sim_t *)(MMAP_SIM); in init_lcd() local
23 out_be16(&sim->par, 0x300); in init_lcd()
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| /openbmc/openpower-hw-diags/test/ |
| H A D | pdbg-sim-only.cpp | 46 int rc = sim::ScomAccess::getSingleton().get(i_target, i_addr, o_val); in getScom()
66 int rc = sim::CfamAccess::getSingleton().get(i_target, i_addr, o_val); in getCfam()
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| H A D | test-pdbg-dts.cpp | 178 sim::ScomAccess& scom = sim::ScomAccess::getSingleton(); in TEST()
212 sim::CfamAccess& cfam = sim::CfamAccess::getSingleton(); in TEST()
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| H A D | test-tod-step-check-fault.cpp | 26 sim::ScomAccess& scom = sim::ScomAccess::getSingleton(); in TEST()
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| H A D | sim-hw-access.hpp | 7 namespace sim namespace
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| /openbmc/qemu/docs/system/ |
| H A D | target-xtensa.rst | 10 - Xtensa emulator pseudo board \"sim\"
14 The sim pseudo board emulation provides an environment similar to one
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| H A D | target-openrisc.rst | 22 ``or1k-sim``.
58 openrisc/or1k-sim
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| /openbmc/qemu/docs/system/openrisc/ |
| H A D | or1k-sim.rst | 22 $ qemu-system-or1k -cpu or1220 -M or1k-sim -nographic \
37 The ``or1k-sim`` board automatically generates a device tree blob ("dtb")
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| H A D | virt.rst | 29 $ qemu-system-or1k -cpu or1220 -M or1k-sim -nographic \
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| /openbmc/openbmc/poky/meta/recipes-devtools/gcc/ |
| H A D | gcc-testsuite.inc | 39 content.append('load_generic_config "sim"')
40 content.append('load_base_board_description "basic-sim"')
69 content.append('set_board_info sim "{0}"'.format(qemu_binary))
70 content.append('set_board_info sim,options "{0}"'.format(" ".join(args)))
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| /openbmc/openbmc/meta-openembedded/meta-filesystems/dynamic-layers/meta-python/recipes-support/gpiod-sysfs-proxy/gpiod-sysfs-proxy/ |
| H A D | run-ptest.in | 6 modprobe gpio-sim
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| /openbmc/qemu/hw/xtensa/ |
| H A D | meson.build | 7 xtensa_ss.add(when: 'CONFIG_XTENSA_SIM', if_true: files('sim.c'))
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| /openbmc/openpower-hw-diags/util/ |
| H A D | meson.build | 7 'pdbg-no-sim.cpp',
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| /openbmc/openpower-hw-diags/ |
| H A D | meson.build | 161 # functions to simulate them for testing (see `test/*-sim-only.cpp`).
175 'test/dbus-sim-only.cpp',
176 'test/pdbg-sim-only.cpp',
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| /openbmc/u-boot/arch/arm/dts/ |
| H A D | imx7ulp.dtsi | 316 nxp,sim = <&sim>;
479 sim = <&sim>;
555 sim: sim@410a3000 { label
556 compatible = "fsl,imx7ulp-sim", "syscon";
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| /openbmc/qemu/tests/tcg/xtensa/ |
| H A D | Makefile.softmmu-target | 19 QEMU_OPTS+=-M sim -cpu $(CORE) -nographic -semihosting -icount 6 $(EXTFLAGS) -kernel
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| /openbmc/openbmc/meta-openembedded/meta-oe/recipes-kernel/crash/crash/ |
| H A D | 0001-cross_add_configure_option.patch | 23 --with-bugurl="" --with-expat=no --with-python=no --disable-sim; \
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| H A D | gdb_build_jobs_and_not_write_crash_target.patch | 28 --with-bugurl="" --with-expat=no --with-python=no --disable-sim; \
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| /openbmc/u-boot/arch/m68k/include/asm/ |
| H A D | immap_5307.h | 20 typedef struct sim { struct
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| /openbmc/openbmc/poky/meta/recipes-devtools/gdb/gdb/ |
| H A D | 0003-Dont-disable-libreadline.a-when-using-disable-static.patch | 33 host_modules= { module= sim; };
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| /openbmc/openbmc/poky/meta/recipes-kernel/linux/ |
| H A D | linux-yocto-rt_6.12.bb | 48 …ls.contains("DISTRO_FEATURES", "ptest", " features/gpio/mockup.scc features/gpio/sim.scc", "", d)}"
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| /openbmc/openbmc/poky/meta/recipes-core/newlib/libgloss/ |
| H A D | fix-rs6000-crt0.patch | 18 @@ -362,7 +362,7 @@ install-sim:
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| /openbmc/openbmc/poky/meta/recipes-devtools/gdb/ |
| H A D | gdb-common.inc | 22 --with-curses --disable-multilib --disable-sim \
|