/openbmc/linux/sound/pci/ctxfi/ |
H A D | cthw20k2.c | 180 set_field(&ctl->ctl, SRCCTL_STATE, state); in src_set_state() 189 set_field(&ctl->ctl, SRCCTL_BM, bm); in src_set_bm() 198 set_field(&ctl->ctl, SRCCTL_RSR, rsr); in src_set_rsr() 207 set_field(&ctl->ctl, SRCCTL_SF, sf); in src_set_sf() 216 set_field(&ctl->ctl, SRCCTL_WR, wr); in src_set_wr() 225 set_field(&ctl->ctl, SRCCTL_PM, pm); in src_set_pm() 234 set_field(&ctl->ctl, SRCCTL_ROM, rom); in src_set_rom() 243 set_field(&ctl->ctl, SRCCTL_VO, vo); in src_set_vo() 252 set_field(&ctl->ctl, SRCCTL_ST, st); in src_set_st() 261 set_field(&ctl->ctl, SRCCTL_IE, ie); in src_set_ie() [all …]
|
H A D | cthw20k1.c | 180 set_field(&ctl->ctl, SRCCTL_STATE, state); in src_set_state() 189 set_field(&ctl->ctl, SRCCTL_BM, bm); in src_set_bm() 198 set_field(&ctl->ctl, SRCCTL_RSR, rsr); in src_set_rsr() 207 set_field(&ctl->ctl, SRCCTL_SF, sf); in src_set_sf() 216 set_field(&ctl->ctl, SRCCTL_WR, wr); in src_set_wr() 225 set_field(&ctl->ctl, SRCCTL_PM, pm); in src_set_pm() 234 set_field(&ctl->ctl, SRCCTL_ROM, rom); in src_set_rom() 243 set_field(&ctl->ctl, SRCCTL_VO, vo); in src_set_vo() 252 set_field(&ctl->ctl, SRCCTL_ST, st); in src_set_st() 261 set_field(&ctl->ctl, SRCCTL_IE, ie); in src_set_ie() [all …]
|
H A D | cthardware.c | 77 void set_field(unsigned int *data, unsigned int field, unsigned int value) in set_field() function
|
H A D | cthardware.h | 199 void set_field(unsigned int *data, unsigned int field, unsigned int value);
|
/openbmc/qemu/target/riscv/ |
H A D | op_helper.c | 298 mstatus = set_field(mstatus, MSTATUS_SIE, in helper_sret() 300 mstatus = set_field(mstatus, MSTATUS_SPIE, 1); in helper_sret() 301 mstatus = set_field(mstatus, MSTATUS_SPP, PRV_U); in helper_sret() 309 env->vsstatus = set_field(env->vsstatus, MSTATUS_SDT, 0); in helper_sret() 312 mstatus = set_field(mstatus, MSTATUS_SDT, 0); in helper_sret() 315 mstatus = set_field(mstatus, MSTATUS_MDT, 0); in helper_sret() 318 mstatus = set_field(mstatus, MSTATUS_MPRV, 0); in helper_sret() 327 hstatus = set_field(hstatus, HSTATUS_SPV, 0); in helper_sret() 345 env->mstatus = set_field(env->mstatus, MSTATUS_SPELP, 0); in helper_sret() 380 mstatus = set_field(mstatus, MSTATUS_SDT, 0); in ssdbltrp_mxret() [all …]
|
H A D | cpu_helper.c | 1109 set_field(env->sctrstatus, SCTRSTATUS_WRPTR_MASK, head); in riscv_ctr_add_entry() 1120 env->ctr_data[head] = set_field(0, CTRDATA_TYPE_MASK, type); in riscv_ctr_add_entry() 1124 env->sctrstatus = set_field(env->sctrstatus, SCTRSTATUS_WRPTR_MASK, head); in riscv_ctr_add_entry() 2227 env->mnstatus = set_field(env->mnstatus, MNSTATUS_NMIE, false); in riscv_do_nmi() 2228 env->mnstatus = set_field(env->mnstatus, MNSTATUS_MNPV, virt); in riscv_do_nmi() 2229 env->mnstatus = set_field(env->mnstatus, MNSTATUS_MNPP, env->priv); in riscv_do_nmi() 2235 env->mnstatus = set_field(env->mnstatus, MNSTATUS_MNPELP, env->elp); in riscv_do_nmi() 2414 env->mstatus = set_field(env->mstatus, MSTATUS_SPELP, env->elp); in riscv_cpu_do_interrupt() 2432 env->hstatus = set_field(env->hstatus, HSTATUS_SPVP, in riscv_cpu_do_interrupt() 2434 env->hstatus = set_field(env->hstatus, HSTATUS_SPV, true); in riscv_cpu_do_interrupt() [all …]
|
H A D | debug.c | 265 textra = set_field(textra, TEXTRA32_MHVALUE, mhvalue); in textra_validate() 266 textra = set_field(textra, TEXTRA32_MHSELECT, mhselect_new); in textra_validate() 270 textra = set_field(textra, TEXTRA64_MHVALUE, mhvalue); in textra_validate() 271 textra = set_field(textra, TEXTRA64_MHSELECT, mhselect_new); in textra_validate() 684 env->tdata1[index] = set_field(env->tdata1[index], in itrigger_set_count()
|
H A D | cpu.c | 1052 env->mstatus = set_field(env->mstatus, MSTATUS64_SXL, env->misa_mxl); in riscv_cpu_reset_hold() 1053 env->mstatus = set_field(env->mstatus, MSTATUS64_UXL, env->misa_mxl); in riscv_cpu_reset_hold() 1055 env->vsstatus = set_field(env->vsstatus, in riscv_cpu_reset_hold() 1057 env->vsstatus = set_field(env->vsstatus, in riscv_cpu_reset_hold() 1059 env->mstatus_hs = set_field(env->mstatus_hs, in riscv_cpu_reset_hold() 1061 env->mstatus_hs = set_field(env->mstatus_hs, in riscv_cpu_reset_hold() 1065 env->mstatus = set_field(env->mstatus, MSTATUS_MDT, 1); in riscv_cpu_reset_hold() 1138 env->mnstatus = set_field(env->mnstatus, MNSTATUS_NMIE, false); in riscv_cpu_reset_hold()
|
H A D | cpu_bits.h | 8 #define set_field(reg, mask, val) (((reg) & ~(uint64_t)(mask)) | \ macro
|
H A D | csr.c | 1959 val = set_field(val, MSTATUS_MPP, old_mpp); in legalize_mpp() 4301 env->sctrdepth = set_field(env->sctrdepth, SCTRDEPTH_MASK, depth); in rmw_sctrdepth() 4487 *val = set_field(*val, HSTATUS_VSXL, 2); in read_hstatus() 4490 *val = set_field(*val, HSTATUS_VSBE, 0); in read_hstatus()
|
/openbmc/qemu/hw/riscv/ |
H A D | riscv-iommu.c | 537 ev.hdr = set_field(ev.hdr, RISCV_IOMMU_FQ_HDR_CAUSE, cause); in riscv_iommu_report_fault() 538 ev.hdr = set_field(ev.hdr, RISCV_IOMMU_FQ_HDR_TTYPE, fault_type); in riscv_iommu_report_fault() 539 ev.hdr = set_field(ev.hdr, RISCV_IOMMU_FQ_HDR_DID, ctx->devid); in riscv_iommu_report_fault() 540 ev.hdr = set_field(ev.hdr, RISCV_IOMMU_FQ_HDR_PV, true); in riscv_iommu_report_fault() 543 ev.hdr = set_field(ev.hdr, RISCV_IOMMU_FQ_HDR_PID, ctx->process_id); in riscv_iommu_report_fault() 893 ctx->gatp = set_field(0, RISCV_IOMMU_ATP_MODE_FIELD, in riscv_iommu_ctx_fetch() 895 ctx->satp = set_field(0, RISCV_IOMMU_ATP_MODE_FIELD, in riscv_iommu_ctx_fetch() 1486 pr.hdr = set_field(RISCV_IOMMU_PREQ_HDR_PV, in riscv_iommu_translate() 1489 pr.hdr = set_field(pr.hdr, RISCV_IOMMU_PREQ_HDR_DID, ctx->devid); in riscv_iommu_translate() 1620 new_ddtp = set_field(new_ddtp & RISCV_IOMMU_DDTP_PPN, in riscv_iommu_process_ddtp() [all …]
|
H A D | riscv-iommu-hpm.c | 375 val = set_field(val, RISCV_IOMMU_IOHPMEVT_EVENT_ID, in riscv_iommu_process_hpmevt_write()
|
/openbmc/qemu/hw/usb/ |
H A D | hcd-ehci.c | 89 #define set_field(data, newval, field) do { \ macro 1166 set_field(&q->qh.altnext_qtd, reload, QH_ALTNEXT_NAKCNT); in ehci_qh_do_overlay() 1231 set_field(&q->qh.token, cpage, QTD_TOKEN_CPAGE); in ehci_finish_transfer() 1288 set_field(&q->qh.token, 0, QTD_TOKEN_CERR); in ehci_execute_complete() 1296 set_field(&q->qh.altnext_qtd, 0, QH_ALTNEXT_NAKCNT); in ehci_execute_complete() 1323 set_field(&q->qh.token, tbytes, QTD_TOKEN_TBYTES); in ehci_execute_complete() 1500 set_field(&itd->transact[i], len - ehci->ipacket.actual_length, in ehci_process_itd() 1503 set_field(&itd->transact[i], ehci->ipacket.actual_length, in ehci_process_itd()
|
H A D | hcd-dwc2.c | 54 #define set_field(data, newval, field) do { \ macro 347 set_field(&hctsiz, pcnt, TSIZ_PKTCNT); in dwc2_handle_packet() 349 set_field(&hctsiz, len, TSIZ_XFERSIZE); in dwc2_handle_packet()
|
H A D | hcd-xhci.c | 219 #define set_field(data, newval, field) do { \ macro 2335 set_field(&slot_ctx[2], xhci->slots[slotid-1].intr, TRB_INTR); in xhci_evaluate_slot() 2658 set_field(&port->portsc, pls, PORTSC_PLS); in xhci_port_update() 2682 set_field(&port->portsc, PLS_U0, PORTSC_PLS); in xhci_port_reset() 2866 set_field(&portsc, new_pls, PORTSC_PLS); in xhci_port_write() 2873 set_field(&portsc, new_pls, PORTSC_PLS); in xhci_port_write() 3256 set_field(&port->portsc, PLS_RESUME, PORTSC_PLS); in xhci_wakeup()
|