Searched refs:sdram_params (Results 1 – 7 of 7) sorted by relevance
263 sdram_params->base.odt); in pctl_cfg()345 if (sdram_params->base.odt) { in phy_cfg()599 &sdram_params->ch[chan]; in dram_all_config()633 sdram_params->num_channels = 1; in sdram_rank_bw_detect()653 sdram_params->ch[channel].dbw = sdram_params->ch[channel].bw; in sdram_rank_bw_detect()728 tmp = sdram_params->ch[0].col - 9; in sdram_get_niu_config()739 sdram_params->base.ddrconfig = i; in sdram_get_niu_config()750 (sdram_params->ch[0].cs0_row + in sdram_get_stride()751 sdram_params->ch[0].col + in sdram_get_stride()753 sdram_params->ch[0].bw + in sdram_get_stride()[all …]
64 struct rk3399_sdram_params sdram_params;115 &sdram_params->ch[channel]; in set_memory_map()198 if (sdram_params->base.odt == 1) in set_ds_odt()312 if (sdram_params->base.odt == 1) { in phy_io_config()426 if (sdram_params->base.ddr_freq < 400) in phy_io_config()513 set_ds_odt(chan, sdram_params); in pctl_cfg()915 + sdram_params->ch[channel].col in set_ddrconfig()916 + sdram_params->ch[channel].bk in set_ddrconfig()944 &sdram_params->ch[channel]; in dram_all_config()1080 dram_all_config(dram, sdram_params); in sdram_init()[all …]
287 if (sdram_params->base.odt) { in phy_cfg()523 if (sdram_params->ch[chnum].bk == 3) in dram_cfg_rbc()542 &sdram_params->ch[chan]; in dram_all_config()556 if (sdram_params->ch[0].rank == 2) in dram_all_config()592 sdram_params->ch[channel].bw = 1; in sdram_rank_bw_detect()600 sdram_params->ch[channel].dbw = sdram_params->ch[channel].bw; in sdram_rank_bw_detect()684 row = sdram_params->ch[0].cs0_row; in sdram_get_niu_config()691 tmp = sdram_params->ch[0].col - 9; in sdram_get_niu_config()703 sdram_params->base.ddrconfig = i; in sdram_get_niu_config()752 sdram_params->ch[channel].bw = 2; in sdram_init()[all …]
408 if (sdram_params->ch[0].bw == 2) in pctl_cfg()608 sdram_params->ch[0].dbw = 1; in dram_cap_detect()610 sdram_params->ch[0].dbw = 2; in dram_cap_detect()628 sdram_params->ch[0].bw = bw; in dram_cap_detect()629 sdram_params->ch[0].bk = 3; in dram_cap_detect()650 sdram_params->ch[0].col = col; in dram_cap_detect()668 sdram_params->ch[0].cs1_row = row; in dram_cap_detect()669 sdram_params->ch[0].row_3_4 = 0; in dram_cap_detect()670 sdram_params->ch[0].cs0_row = row; in dram_cap_detect()678 sdram_params->ch[0].rank = 2; in dram_cap_detect()[all …]
32 struct sdram_params { struct49 static struct sdram_params sdram_tbl[] __initdata = { argument115 static struct sdram_params sdram_params; variable144 struct sdram_params *sdram) in sdram_calculate_timing()213 sdram_update_refresh(u_int cpu_khz, struct sdram_params *sdram) in sdram_update_refresh()231 struct sdram_params *sdram = &sdram_params; in sa1110_target()322 static struct sdram_params *sa1110_find_sdram(const char *name) in sa1110_find_sdram()324 struct sdram_params *sdram; in sa1110_find_sdram()338 struct sdram_params *sdram; in sa1110_clk_init()358 memcpy(&sdram_params, sdram, sizeof(sdram_params)); in sa1110_clk_init()
124 struct sdram_params sdram; in warmboot_save_sdram_params()142 (char *)((struct sdram_params *)SDRAM_PARAMS_BASE + ram_code), in warmboot_save_sdram_params()
27 struct sdram_params { struct