Home
last modified time | relevance | path

Searched refs:sdram_data (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_sdram.c103 var1 = ((sdram_data[uj] >> val) & CMP_BYTE_MASK); in compare_pattern_v1()
136 if (((sdram_data[uj]) != (pattern[uj])) && (*pup != 0x3)) { in compare_pattern_v2()
140 var1 = (sdram_data[uj] >> val) & CMP_BYTE_MASK; in compare_pattern_v2()
234 ddr3_dram_sram_burst(SDRAM_PBS_TX_OFFS, (u32)sdram_data, in ddr3_sdram_dm_compare()
245 sdram_data[0] = *(u32 *)(SDRAM_PBS_TX_OFFS + 0x10); in ddr3_sdram_dm_compare()
246 sdram_data[1] = *(u32 *)(SDRAM_PBS_TX_OFFS + 0x14); in ddr3_sdram_dm_compare()
249 if (((sdram_data[uj]) != (pattern[uj])) && in ddr3_sdram_dm_compare()
253 var1 = ((sdram_data[uj] >> val) & CMP_BYTE_MASK); in ddr3_sdram_dm_compare()
337 if ((sdram_data[ui]) != (pattern_ptr[ui])) { in ddr3_sdram_pbs_compare()
342 var1 = ((sdram_data[ui] >> val) & in ddr3_sdram_pbs_compare()
[all …]
H A Dddr3_write_leveling.c191 u32 sdram_data[LEN_WL_SUP_PATTERN] __aligned(32) = { 0 }; in ddr3_wl_supplement() local
276 sdram_data, in ddr3_wl_supplement()
286 DEBUG_WL_D(sdram_data[uj], in ddr3_wl_supplement()
311 ((sdram_data[idx] >> in ddr3_wl_supplement()