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Searched refs:sdr_rw_load_mgr_regs (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/drivers/ddr/altera/
H A Dsequencer.c754 writel(0xff, &sdr_rw_load_mgr_regs->load_cntr0); in set_jump_as_return()
808 &sdr_rw_load_mgr_regs->load_cntr1); in delay_for_n_mem_clocks()
817 &sdr_rw_load_mgr_regs->load_cntr0); in delay_for_n_mem_clocks()
820 &sdr_rw_load_mgr_regs->load_cntr1); in delay_for_n_mem_clocks()
853 &sdr_rw_load_mgr_regs->load_cntr0); in rw_mgr_mem_init_load_regs()
855 &sdr_rw_load_mgr_regs->load_cntr1); in rw_mgr_mem_init_load_regs()
857 &sdr_rw_load_mgr_regs->load_cntr2); in rw_mgr_mem_init_load_regs()
1071 writel(0xFF, &sdr_rw_load_mgr_regs->load_cntr2); in rw_mgr_mem_calibrate_write_test_issue()
1111 writel(0x0, &sdr_rw_load_mgr_regs->load_cntr2); in rw_mgr_mem_calibrate_write_test_issue()
1144 writel(0x30, &sdr_rw_load_mgr_regs->load_cntr1); in rw_mgr_mem_calibrate_write_test_issue()
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