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Searched refs:sdmmc_mux (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/clk/tegra/
H A Dclk-sdmmc-mux.c82 writel(val, sdmmc_mux->reg); in clk_sdmmc_mux_set_parent()
146 if (sdmmc_mux->lock) in clk_sdmmc_mux_set_rate()
157 writel(val, sdmmc_mux->reg); in clk_sdmmc_mux_set_rate()
160 if (sdmmc_mux->lock) in clk_sdmmc_mux_set_rate()
253 sdmmc_mux = kzalloc(sizeof(*sdmmc_mux), GFP_KERNEL); in tegra_clk_register_sdmmc_mux_div()
254 if (!sdmmc_mux) in tegra_clk_register_sdmmc_mux_div()
258 sdmmc_mux->hw.init = &init; in tegra_clk_register_sdmmc_mux_div()
260 sdmmc_mux->lock = lock; in tegra_clk_register_sdmmc_mux_div()
262 sdmmc_mux->gate.regs = bank; in tegra_clk_register_sdmmc_mux_div()
271 kfree(sdmmc_mux); in tegra_clk_register_sdmmc_mux_div()
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/openbmc/linux/drivers/clk/socfpga/
H A Dclk-s10.c146 static const struct clk_parent_data sdmmc_mux[] = { variable
288 { STRATIX10_SDMMC_CLK, "sdmmc_clk", NULL, sdmmc_mux, ARRAY_SIZE(sdmmc_mux), 0, 0xA4,
H A Dclk-agilex.c183 static const struct clk_parent_data sdmmc_mux[] = { variable
317 { AGILEX_SDMMC_CLK, "sdmmc_clk", NULL, sdmmc_mux, ARRAY_SIZE(sdmmc_mux), 0, 0x7C,