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Searched refs:sdhci_ctrl_base (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/drivers/mmc/
H A Daspeed_sdhci_ic.c44 void __iomem *sdhci_ctrl_base; in aspeed_sdhci_irq_probe() local
60 sdhci_ctrl_base = (void __iomem *)regs.start; in aspeed_sdhci_irq_probe()
63 writel(timing_phase, sdhci_ctrl_base + TIMING_PHASE_OFFSET); in aspeed_sdhci_irq_probe()
66 reg_val = readl(sdhci_ctrl_base + SDHCI140_SLOT_0_CAP_REG_1_OFFSET); in aspeed_sdhci_irq_probe()
69 writel(reg_val, sdhci_ctrl_base + SDHCI140_SLOT_0_MIRROR_OFFSET); in aspeed_sdhci_irq_probe()
70 reg_val = readl(sdhci_ctrl_base + SDHCI240_SLOT_0_CAP_REG_1_OFFSET); in aspeed_sdhci_irq_probe()
73 writel(reg_val, sdhci_ctrl_base + SDHCI240_SLOT_0_MIRROR_OFFSET); in aspeed_sdhci_irq_probe()