Searched refs:scu_ctrl (Results 1 – 4 of 4) sorted by relevance
40 u32 scu_ctrl; in scu_enable() local45 scu_ctrl = readl_relaxed(scu_base + 0x30); in scu_enable()46 if (!(scu_ctrl & 1)) in scu_enable()47 writel_relaxed(scu_ctrl | 0x1, scu_base + 0x30); in scu_enable()51 scu_ctrl = readl_relaxed(scu_base + SCU_CTRL); in scu_enable()53 if (scu_ctrl & SCU_ENABLE) in scu_enable()56 scu_ctrl |= SCU_ENABLE; in scu_enable()61 scu_ctrl |= SCU_STANDBY_ENABLE; in scu_enable()63 writel_relaxed(scu_ctrl, scu_base + SCU_CTRL); in scu_enable()
103 u32 scu_ctrl, tmp; in psci_board_init() local107 scu_ctrl = readl(scu_base + 0x30); in psci_board_init()108 if (!(scu_ctrl & 1)) in psci_board_init()109 writel(scu_ctrl | 0x1, scu_base + 0x30); in psci_board_init()111 scu_ctrl = readl(scu_base + SCU_CTRL); in psci_board_init()112 scu_ctrl |= SCU_ENABLE | SCU_STANDBY_ENABLE; in psci_board_init()113 writel(scu_ctrl, scu_base + SCU_CTRL); in psci_board_init()
121 if (readl(&scu->scu_ctrl) & SCU_CTRL_ENABLE) in enable_scu()128 reg = readl(&scu->scu_ctrl); in enable_scu()130 writel(reg, &scu->scu_ctrl); in enable_scu()
12 uint scu_ctrl; /* SCU Control Register, offset 00 */ member