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Searched refs:sau (Results 1 – 5 of 5) sorted by relevance

/openbmc/qemu/hw/intc/
H A Darmv7m_nvic.c1434 return cpu->env.sau.ctrl; in nvic_readl()
1450 return cpu->env.sau.rnr; in nvic_readl()
1453 int region = cpu->env.sau.rnr; in nvic_readl()
1464 return cpu->env.sau.rbar[region]; in nvic_readl()
1468 int region = cpu->env.sau.rnr; in nvic_readl()
1479 return cpu->env.sau.rlar[region]; in nvic_readl()
1969 cpu->env.sau.ctrl = value & 3; in nvic_writel()
1988 cpu->env.sau.rnr = value; in nvic_writel()
1993 int region = cpu->env.sau.rnr; in nvic_writel()
2004 cpu->env.sau.rbar[region] = value & ~0x1f; in nvic_writel()
[all …]
/openbmc/qemu/target/arm/
H A Dmachine.c684 return cpu->env.sau.rnr < cpu->sau_sregion; in sau_rnr_vmstate_validate()
723 VMSTATE_VARRAY_UINT32(env.sau.rbar, ARMCPU, sau_sregion, 0,
725 VMSTATE_VARRAY_UINT32(env.sau.rlar, ARMCPU, sau_sregion, 0,
727 VMSTATE_UINT32(env.sau.rnr, ARMCPU),
729 VMSTATE_UINT32(env.sau.ctrl, ARMCPU),
H A Dcpu.c550 memset(env->sau.rbar, 0, sizeof(*env->sau.rbar) * cpu->sau_sregion); in arm_cpu_reset_hold()
551 memset(env->sau.rlar, 0, sizeof(*env->sau.rlar) * cpu->sau_sregion); in arm_cpu_reset_hold()
553 env->sau.rnr = 0; in arm_cpu_reset_hold()
557 env->sau.ctrl = 0; in arm_cpu_reset_hold()
2525 env->sau.rbar = g_new0(uint32_t, nr); in arm_cpu_realizefn()
2526 env->sau.rlar = g_new0(uint32_t, nr); in arm_cpu_realizefn()
H A Dptw.c2843 switch (env->sau.ctrl & 3) { in v8m_security_lookup()
2851 if (env->sau.rlar[r] & 1) { in v8m_security_lookup()
2852 uint32_t base = env->sau.rbar[r] & ~0x1f; in v8m_security_lookup()
2853 uint32_t limit = env->sau.rlar[r] | 0x1f; in v8m_security_lookup()
2871 if (env->sau.rlar[r] & 2) { in v8m_security_lookup()
H A Dcpu.h768 } sau;
767 } sau; global() member