Searched refs:rx_ctl (Results 1 – 4 of 4) sorted by relevance
35 u32 rx_ctl; /* 0x3c */ member290 writel(EMAC_RX_SETUP, ®s->rx_ctl); in emac_setup()351 setbits_le32(®s->rx_ctl, 0x8); in _sunxi_emac_eth_init()435 setbits_le32(®s->rx_ctl, 0x1 << 3); in _sunxi_emac_eth_recv()436 while (readl(®s->rx_ctl) & (0x1 << 3)) in _sunxi_emac_eth_recv()
365 u16 rx_ctl; in asix_basic_reset() local393 rx_ctl = asix_read_rx_ctl(dev); in asix_basic_reset()394 debug("RX_CTL is 0x%04x after software reset\n", rx_ctl); in asix_basic_reset()398 rx_ctl = asix_read_rx_ctl(dev); in asix_basic_reset()399 debug("RX_CTL is 0x%04x setting to 0x0000\n", rx_ctl); in asix_basic_reset()
162 uint32_t rx_ctl; member
262 return s->rx_ctl; in aw_emac_read()385 s->rx_ctl = value; in aw_emac_write()501 VMSTATE_UINT32(rx_ctl, AwEmacState),