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Searched refs:rtl92e_set_bb_reg (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/drivers/staging/rtl8192e/rtl8192e/
H A Dr8192E_phy.c70 rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset, in _rtl92e_phy_rf_read()
77 rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset, in _rtl92e_phy_rf_read()
118 rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset, in _rtl92e_phy_rf_write()
125 rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset, in _rtl92e_phy_rf_write()
142 rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset, in _rtl92e_phy_rf_write()
409 rtl92e_set_bb_reg(dev, rFPGA0_TxGainStage, in _rtl92e_bb_config_para_file()
870 rtl92e_set_bb_reg(dev, rOFDM1_LSTF, 0xC00, in _rtl92e_set_bw_mode_work_item()
925 rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x8); in rtl92e_init_gain()
963 rtl92e_set_bb_reg(dev, rCCK0_CCA, BitMask, in rtl92e_init_gain()
1035 rtl92e_set_bb_reg(dev, rOFDM0_TRxPathEnable, in _rtl92e_set_rf_power_state()
[all …]
H A Dr8190P_rtl8256.c80 rtl92e_set_bb_reg(dev, pPhyReg->rfintfe, bRFSI_RFENV << 16, 0x1); in rtl92e_config_rf()
82 rtl92e_set_bb_reg(dev, pPhyReg->rfintfo, bRFSI_RFENV, 0x1); in rtl92e_config_rf()
84 rtl92e_set_bb_reg(dev, pPhyReg->rfHSSIPara2, in rtl92e_config_rf()
86 rtl92e_set_bb_reg(dev, pPhyReg->rfHSSIPara2, in rtl92e_config_rf()
115 rtl92e_set_bb_reg(dev, pPhyReg->rfintfs, bRFSI_RFENV, in rtl92e_config_rf()
119 rtl92e_set_bb_reg(dev, pPhyReg->rfintfs, in rtl92e_config_rf()
151 rtl92e_set_bb_reg(dev, rTxAGC_CCK_Mcs32, bTxAGCRateCCK, TxAGC); in rtl92e_set_cck_tx_power()
196 rtl92e_set_bb_reg(dev, RegOffset[index], 0x7f7f7f7f, writeVal); in rtl92e_set_ofdm_tx_power()
H A Drtl_dm.c477 rtl92e_set_bb_reg(dev, in _rtl92e_dm_tx_update_tssi_weak_signal()
483 rtl92e_set_bb_reg(dev, rOFDM0_XATxIQImbalance, in _rtl92e_dm_tx_update_tssi_weak_signal()
495 rtl92e_set_bb_reg(dev, rOFDM0_XATxIQImbalance, in _rtl92e_dm_tx_update_tssi_strong_signal()
499 rtl92e_set_bb_reg(dev, rOFDM0_XATxIQImbalance, in _rtl92e_dm_tx_update_tssi_strong_signal()
966 rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x8); in _rtl92e_dm_bb_initialgain_restore()
976 rtl92e_set_bb_reg(dev, rCCK0_CCA, bit_mask, in _rtl92e_dm_bb_initialgain_restore()
978 rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x1); in _rtl92e_dm_bb_initialgain_restore()
991 rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x8); in rtl92e_dm_backup_state()
1745 rtl92e_set_bb_reg(dev, rOFDM0_TRxPathEnable, in _rtl92e_dm_rx_path_sel_byrssi()
1771 rtl92e_set_bb_reg(dev, in _rtl92e_dm_rx_path_sel_byrssi()
[all …]
H A Dr8192E_phy.h28 void rtl92e_set_bb_reg(struct net_device *dev, u32 dwRegAddr,
H A Dr8192E_dev.c646 rtl92e_set_bb_reg(dev, rFPGA0_RFMOD, bCCKEn, 0x1); in rtl92e_start_adapter()
647 rtl92e_set_bb_reg(dev, rFPGA0_RFMOD, bOFDMEn, 0x1); in rtl92e_start_adapter()