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Searched refs:rl_phase_val (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/drivers/ddr/marvell/a38x/
H A Dddr3_training_leveling.c1679 int rl_adll_val, rl_phase_val, sdr_cycle_incr, rd_sample, rd_ready; in mv_ddr_rl_dqs_burst() local
1758 rl_phase_val = sdr_cycle_incr / MAX_RD_SAMPLES; in mv_ddr_rl_dqs_burst()
1760 ((rl_phase_val & RL_PH_SEL_MASK) << RL_PH_SEL_OFFS); in mv_ddr_rl_dqs_burst()
1933 rl_phase_val = i / MAX_RD_SAMPLES; in mv_ddr_rl_dqs_burst()
1934 rl_phase_val -= phase_delta; in mv_ddr_rl_dqs_burst()
1938 final_rd_ready, rl_phase_val, rl_adll_val)); in mv_ddr_rl_dqs_burst()
1941 ((rl_phase_val & RL_PH_SEL_MASK) << RL_PH_SEL_OFFS); in mv_ddr_rl_dqs_burst()