Home
last modified time | relevance | path

Searched refs:rl_adll_val (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/drivers/ddr/marvell/a38x/
H A Dddr3_training_leveling.c1679 int rl_adll_val, rl_phase_val, sdr_cycle_incr, rd_sample, rd_ready; in mv_ddr_rl_dqs_burst() local
1757 rl_adll_val = sdr_cycle_incr % MAX_RD_SAMPLES; in mv_ddr_rl_dqs_burst()
1759 rl_val = ((rl_adll_val & RL_REF_DLY_MASK) << RL_REF_DLY_OFFS) | in mv_ddr_rl_dqs_burst()
1932 rl_adll_val = i % MAX_RD_SAMPLES; in mv_ddr_rl_dqs_burst()
1938 final_rd_ready, rl_phase_val, rl_adll_val)); in mv_ddr_rl_dqs_burst()
1940 rl_val = ((rl_adll_val & RL_REF_DLY_MASK) << RL_REF_DLY_OFFS) | in mv_ddr_rl_dqs_burst()