| /openbmc/u-boot/drivers/clk/rockchip/ |
| H A D | clk_rk3368.c | 88 static int rkclk_set_pll(struct rk3368_cru *cru, enum rk3368_pll_id pll_id, in rkclk_set_pll() function
134 rkclk_set_pll(cru, APLLB, &apll_b_init_cfg); in rkclk_init()
135 rkclk_set_pll(cru, APLLL, &apll_l_init_cfg); in rkclk_init()
141 rkclk_set_pll(cru, GPLL, &gpll_init_cfg); in rkclk_init()
142 rkclk_set_pll(cru, CPLL, &cpll_init_cfg); in rkclk_init()
305 rkclk_set_pll(cru, DPLL, dpll_cfg); in rk3368_ddr_set_clk()
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| H A D | clk_rk3188.c | 85 static int rkclk_set_pll(struct rk3188_cru *cru, enum rk_clk_id clk_id, in rkclk_set_pll() function
152 rkclk_set_pll(cru, CLK_DDR, &dpll_cfg[cfg], has_bwadj); in rkclk_configure_ddr()
201 rkclk_set_pll(cru, CLK_ARM, &apll_cfg[cfg], has_bwadj); in rkclk_configure_cpu()
385 rkclk_set_pll(cru, CLK_GENERAL, &gpll_init_cfg, has_bwadj); in rkclk_init()
386 rkclk_set_pll(cru, CLK_CODEC, &cpll_init_cfg, has_bwadj); in rkclk_init()
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| H A D | clk_rk322x.c | 41 static int rkclk_set_pll(struct rk322x_cru *cru, enum rk_clk_id clk_id, in rkclk_set_pll() function
92 rkclk_set_pll(cru, CLK_ARM, &apll_init_cfg); in rkclk_init()
93 rkclk_set_pll(cru, CLK_GENERAL, &gpll_init_cfg); in rkclk_init()
340 rkclk_set_pll(cru, CLK_DDR, &dpll_cfg); in rk322x_ddr_set_clk()
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| H A D | clk_rk3036.c | 44 static int rkclk_set_pll(struct rk3036_cru *cru, enum rk_clk_id clk_id, in rkclk_set_pll() function
91 rkclk_set_pll(cru, CLK_ARM, &apll_init_cfg); in rkclk_init()
92 rkclk_set_pll(cru, CLK_GENERAL, &gpll_init_cfg); in rkclk_init()
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| H A D | clk_rk3399.c | 314 static void rkclk_set_pll(u32 *pll_con, const struct pll_div *div) in rkclk_set_pll() function
429 rkclk_set_pll(&cru->apll_l_con[0], apll_l_cfgs[apll_l_freq]); in rk3399_configure_cpu_l()
464 rkclk_set_pll(&cru->apll_b_con[0], apll_b_cfgs[apll_b_freq]); in rk3399_configure_cpu_b()
710 rkclk_set_pll(&cru->vpll_con[0], &vpll_config); in rk3399_vop_set_clk()
860 rkclk_set_pll(&cru->dpll_con[0], &dpll_cfg); in rk3399_ddr_set_clk()
1113 rkclk_set_pll(&cru->gpll_con[0], &gpll_init_cfg); in rkclk_init()
1114 rkclk_set_pll(&cru->cpll_con[0], &cpll_init_cfg); in rkclk_init()
1372 rkclk_set_pll(&pmucru->ppll_con[0], &ppll_init_cfg); in pmuclk_init()
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| H A D | clk_rk3288.c | 144 static int rkclk_set_pll(struct rk3288_cru *cru, enum rk_clk_id clk_id, in rkclk_set_pll() function
208 rkclk_set_pll(cru, CLK_DDR, &dpll_cfg[cfg]); in rkclk_configure_ddr()
349 rkclk_set_pll(cru, CLK_NEW, &npll_config); in rockchip_vop_set_clk()
434 rkclk_set_pll(cru, CLK_GENERAL, &gpll_init_cfg); in rkclk_init()
435 rkclk_set_pll(cru, CLK_CODEC, &cpll_init_cfg); in rkclk_init()
501 rkclk_set_pll(cru, CLK_ARM, &apll_init_cfg); in rk3288_clk_configure_cpu()
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| H A D | clk_rk3128.c | 38 static int rkclk_set_pll(struct rk3128_cru *cru, enum rk_clk_id clk_id, in rkclk_set_pll() function
153 rkclk_set_pll(cru, CLK_ARM, &apll_init_cfg); in rkclk_init()
154 rkclk_set_pll(cru, CLK_GENERAL, &gpll_init_cfg); in rkclk_init()
440 rkclk_set_pll(cru, CLK_CODEC, &cpll_config); in rk3128_vop_set_clk()
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| H A D | clk_rk3328.c | 206 static void rkclk_set_pll(struct rk3328_cru *cru, enum rk_clk_id clk_id, in rkclk_set_pll() function
286 rkclk_set_pll(cru, CLK_GENERAL, &gpll_init_cfg); in rkclk_init()
287 rkclk_set_pll(cru, CLK_CODEC, &cpll_init_cfg); in rkclk_init()
311 rkclk_set_pll(cru, CLK_ARM, apll_cfgs[apll_freq]); in rk3328_configure_cpu()
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| H A D | clk_rv1108.c | 65 static int rkclk_set_pll(struct rv1108_cru *cru, enum rk_clk_id clk_id, in rkclk_set_pll() function
642 rkclk_set_pll(cru, CLK_ARM, &apll_init_cfg); in rkclk_init()
643 rkclk_set_pll(cru, CLK_GENERAL, &gpll_init_cfg); in rkclk_init()
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