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Searched refs:riscv_lg2_vlenb (Results 1 – 3 of 3) sorted by relevance

/openbmc/qemu/util/
H A Dcpuinfo-riscv.c17 unsigned riscv_lg2_vlenb; variable
145 riscv_lg2_vlenb = ctz32(vlenb); in cpuinfo_init()
/openbmc/qemu/host/include/riscv/host/
H A Dcpuinfo.h17 extern unsigned riscv_lg2_vlenb;
/openbmc/qemu/tcg/riscv/
H A Dtcg-target.c.inc785 int lmul = type - riscv_lg2_vlenb;
1016 if (type >= riscv_lg2_vlenb) {
1020 unsigned idx = type - riscv_lg2_vlenb;
1055 if (type >= riscv_lg2_vlenb) {
1059 unsigned idx = type - riscv_lg2_vlenb;
2852 int lmul = type - riscv_lg2_vlenb;
2887 /* Match riscv_lg2_vlenb to TCG_TYPE_V64. */
2926 switch (riscv_lg2_vlenb) {
2941 tcg_debug_assert(riscv_lg2_vlenb >= TCG_TYPE_V256);