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Searched refs:riscv_is_32bit (Results 1 – 5 of 5) sorted by relevance

/openbmc/qemu/hw/riscv/
H A Dboot.c37 bool riscv_is_32bit(RISCVHartArrayState *harts) in riscv_is_32bit() function
71 if (riscv_is_32bit(harts)) { in riscv_calc_kernel_start_addr()
80 if (riscv_is_32bit(harts)) { in riscv_default_firmware_name()
261 if (riscv_is_32bit(harts)) { in riscv_load_kernel()
391 if (!riscv_is_32bit(harts)) { in riscv_setup_rom_reset_vec()
409 if (riscv_is_32bit(harts)) { in riscv_setup_rom_reset_vec()
H A Dsifive_u.c563 create_fdt(s, memmap, riscv_is_32bit(&s->soc.u_cpus)); in sifive_u_machine_init()
616 if (!riscv_is_32bit(&s->soc.u_cpus)) { in sifive_u_machine_init()
636 if (riscv_is_32bit(&s->soc.u_cpus)) { in sifive_u_machine_init()
H A Dspike.c301 create_fdt(s, memmap, riscv_is_32bit(&s->soc[0]), htif_custom_base); in spike_board_init()
H A Dvirt.c242 bool is_32_bit = riscv_is_32bit(&s->soc[0]); in create_fdt_socket_cpus()
1474 if (riscv_is_32bit(&s->soc[0])) { in virt_machine_init()
/openbmc/qemu/include/hw/riscv/
H A Dboot.h30 bool riscv_is_32bit(RISCVHartArrayState *harts);